Fast Track to Riviera-PRO, Part 1: Design Entry and Simulation

Aldec
                                                          Logo

Fast Track to Riviera-PRO, Part 1: Design Entry and Simulation
Presenter: Sunil Sahoo, Applications Engineer
Thursday, February 25, 2021

Abstract:

Riviera-PRO™ Advanced Verification Platform addresses the verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards. This first webinar of a two-part “Fast Track” series is designed to help functional verification engineers get up to speed quickly with Design Management and Design Entry in Riviera-PRO. Includes tips and tricks to enable easier debugging of designs. Also covers how to run Simulations and handling waveforms.

Agenda: 

  • Live demo of Riviera-PRO Design entry and simulation features
  • Conclusion
  • Q&A

Event Info

EU Session

 3:00 PM – 4:00 PM CET

 Thursday, February 25, 2021

Register for EU Session

US Session

 11:00 AM – 12:00 PM PT

 Thursday, February 25, 2021

Register for US Session

 

 

Presenter

Sunil
                                                          Sahoo
Sunil Sahoo

Bio:

Sunil Sahoo provides support for customers exploring simulation tools as an Aldec Applications Engineer. His practical engineering experience includes areas in, Digital Designing, Functional Verification and Wireless Communications. He has worked in wide range of engineering positions that include Digital Design Engineer Verification Engineer and  Applications Engineer. He received his B.S. in Electronics and Communications Engineering from VIT University, India in 2008 and M.S in Computer Engineering from Villanova University, PA in 2010.

 

View On Demand Webinar  View Upcoming Webinars

 

Featured Video
Jobs
CAD Engineer for Nvidia at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise