ARLINGTON, Va. — (BUSINESS WIRE) — February 2, 2021 — JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, announces the publication of JEP183: Guidelines for Measuring the Threshold Voltage (V_T) of SiC MOSFETs. The first publication developed by JEDEC’s JC-70.2 silicon carbide subcommittee, JEP183 is available for free download from the JEDEC website.

JEP183 addresses the critical topic of accurately measuring the threshold voltage (V_T) of SiC MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor), addressing the unique behavior of SiC MOSFETs.

The threshold voltage test methods provided in JEP183 can be used as a common industry guideline for measuring V_T of SiC power devices, focused on N-channel vertical structure MOSFET technologies, providing a common baseline for the SiC MOSFET market. For flexibility, three test methods are offered which may be applied for datasheet, process control, technology development, final tests and other usage. Threshold voltage is a key parameter in the evaluation of changes in the characteristics of physical stimulus such as voltage and/or temperature stress. Without accurately measuring V_T, it is not possible to monitor how device characteristics are changed by the stress applied to a device. SiC/SiO2 interface of SiC MOSFET is more complex than the Si/SiO2 interface, which requires careful handling of traps in the device with regard to the change monitoring of characteristics.

“JEP183 recommends approaches for precise and repeatable measurements of SiC MOSFET V_T, which will help ensure successful implementation of SiC devices in automotive and industrial markets,” noted Dr. Jeffrey Casady, Power Die Product Marketing Engineering Manager, Wolfspeed, A Cree Company and the chair of the JC-70.2 subcommittee.

“JEDEC’s JC-70 committee is pleased to add JEP183 to its expanding ecosystem of publications. With this first SiC related document we are kicking off a series of guidelines addressing the needs of the industry to work on commonly aligned standards,” said Dr. Peter Friedrichs, Vice President SiC, Infineon Technologies, and the vice-chair of the JC-70.2 subcommittee.

About JC-70

Formed in October 2017 with twenty-three member companies, JC-70 now has over 60 member companies, which underscores industry commitment to the development of universal standards to help advance the adoption of wide bandgap (WBG) power technologies. Global multinational corporations and technology startups from the US, Europe, Middle East, and Asia are working together to bring to the industry a set of standards for reliability, testing, and parametrics of WBG power semiconductors. Committee members include industry leaders in power GaN and SiC semiconductors, as well as users of wide bandgap power devices, and test and measurement equipment suppliers. Technical experts from universities and national labs also provide input.

Interested companies worldwide are welcome to join JEDEC to participate in this important standardization effort. The next JC-70 committee meeting will be held on February 16, 2021 on a virtual platform. Contact Emily Desjardins ( emilyd@jedec.org) for more information or visit www.jedec.org.

About JEDEC

JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing over 300 member companies work together in 100+ JEDEC committees and task groups to meet the needs of every segment of the industry, for manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for download from the JEDEC website. For more information, visit www.jedec.org.

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Emily Desjardins
emilyd@jedec.org
703-907-7560