GLEN ROCK, New Jersey, January 29, 2020 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers, announces additions to DMA Controller Verilog IP Core offerings with capabilites to stream video or data to and from memory as well as to and from over PCIe and UDP/IP Network Interfaces.

Digital Blocks DMA Controller IP Core family members are as follows:

DMA Controller Engines

UDP/IP Hardware Stack with DMA Controller

PCIe Interface with DMA Controller

AXI4-Stream to Memory driven by DMA Controller

AXI4-Stream from Memory driven by DMA Controller

AXI4 Multi-Channel DMA Controller, 1-64 Channels, Scatter-Gather, 2D transfers, Security, high perfomance

AHB5 Multi-Channel DMA Controller – targets latest AHB Interconnect

“The UDP/IP DMA Controller combines Digital Blocks expertise in UDP networking and high-performance DMA Controllers” said Steven Stein, CEO of Digital Blocks. “Likewise, the PCIe Interface with DMA Controller supports Xilinx and ntel/Altera PCIe IP to transfer video up to demaing UHD.”

Price and Availability

The Digital Blocks DMA Controller IP Core family is available in synthesizable Verilog, along with a comprehensive simulation test suite, datasheet, and user manual. For further information, product evaluation, or pricing, please go to Digital Blocks at https://www.digitalblocks.com/dma.html 

About Digital Blocks

Digital Blocks is a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers requiring best-in-class IP for Embedded Processors, I2C/SPI/DMA Peripherals, TFT LCD/OLED Display Controllers & Processors, 2D Graphics Hardware Accelerator Engines, LVDS Display Link Layer Drivers, Video Signal & Image Processing, and Low-Latency TCP/UDP/RTP Hardware Protocol Stacks.