Breakthrough Reported in Fabricating Nanochips

In the Quest for Smaller, Faster 2D Processors, NYU Tandon-Led Research Team Invents Thermal Lithography Process for Higher Quality, Lower Cost, and Mass Production Potential

BROOKLYN, N.Y., Jan. 23, 2019 — (PRNewswire) —  An international team of researchers has reported a breakthrough in fabricating atom-thin processors – a discovery that could have far-reaching impacts on nanoscale chip production and in labs across the globe where scientists are exploring 2D materials for ever-smaller and -faster semiconductors.

In the NYU Tandon PicoForce Lab, Professor Elisa Riedo and doctoral student Xiangyu Liu fabricate high-quality 2D chips using the thermal scanning probe lithography process they invented and equipment by SwissLitho. The new process promises to make design and fabrication significantly easier and less expensive than today's electron beam lithography.

The team, headed by New York University Tandon School of Engineering Professor of Chemical and Biomolecular Engineering Elisa Riedo, outlined the research results in the latest issue of Nature Electronics.

They demonstrate that lithography using a probe heated above 100 degrees Celsius outperformed standard methods for fabricating metal electrodes on 2D semiconductors such as molybdenum disulfide (MoS2). Such transitional metals are among the materials that scientists believe may supplant silicon for atomically small chips. The team's new fabrication method – called thermal scanning probe lithography (t-SPL) – offers a number of advantages over today's electron beam lithography (EBL).

First, thermal lithography significantly improves the quality of the 2D transistors, offsetting the Schottky barrier, which hampers the flow of electrons at the intersection of metal and the 2D substrate. Also, unlike EBL, the thermal lithography allows chip designers to easily image the 2D semiconductor and then pattern the electrodes where desired. Also, t-SPL fabrication systems promise significant initial savings as well as operational costs: They dramatically reduce power consumption by operating in ambient conditions, eliminating the need to produce high-energy electrons and to generate an ultra-high vacuum. Finally, this thermal fabrication method can be easily scaled up for industrial production by using parallel thermal probes.

Riedo expressed hope that t-SPL will take most fabrication out of scarce clean rooms – where researchers must compete for time with the expensive equipment – and into individual laboratories, where they might rapidly advance materials science and chip design. The precedent of 3D printers is an apt analogy: Someday these t-SPL tools with sub-10 nanometer resolution, running on standard 120-volt power in ambient conditions, could become similarly ubiquitous in research labs like hers.

"Patterning Metal Contacts on Monolayer MoS2 with Vanishing Schottky Barriers Using Thermal Nanolithography" appears in the January 2019 edition of Nature Electronics and can be accessed at http://dx.doi.org/10.1038/s41928-018-0191-0 with a "News & Views" analysis at https://www.nature.com/articles/s41928-018-0197-7.

Riedo's work on thermal probes dates back more than a decade, first with IBM Research - Zurich and subsequently SwissLitho, founded by former IBM researchers. A process based on a SwissLitho system was developed and used for the current research. She began exploring thermal lithography for metal nanomanufacturing at the City University of New York (CUNY) Graduate Center Advanced Science Research Center (ASRC), working alongside co-first-authors of the paper, Xiaorui Zheng and Annalisa Calò, who are now post-doctoral researchers at NYU Tandon; and Edoardo Albisetti, who worked on the Riedo team with a Marie Curie Fellowship.

Contributing authors include NYU Tandon Assistant Professor of Electrical and Computer Engineering Davood Shahrjerdi; NYU Tandon doctoral students Xiangyu Liu and Abdullah Sanad M. Alharbi; Columbia University's Ghidewon Arefe, James Hone, Brian S. Lee, and Michal Lipson; Sungkyunkwan (Korea) University's Xiaochi Liu and Won Jong Yoo;  SwissLitho's Martin Spieser; the Japanese National Institute of Materials Science's Takashi Taniguchi and Kenji Watanabe; Italy's National Research Council's Carmela Aruta; and the Swiss École Polytechnique Fédérale de Lausanne's Alberto Ciarrocchi and Andras Kis.

The research was supported by the U.S. Army Research Office, the Office of Basic Energy Sciences of the U.S. Department of Energy, the National Science Foundation, and the European Union's Horizon 2020 Research and Innovation Programme. 

About the New York University Tandon School of Engineering
The NYU Tandon School of Engineering dates to 1854, the founding date for both the New York University School of Civil Engineering and Architecture and the Brooklyn Collegiate and Polytechnic Institute (widely known as Brooklyn Poly). A January 2014 merger created a comprehensive school of education and research in engineering and applied sciences, rooted in a tradition of invention and entrepreneurship and dedicated to furthering technology in service to society. In addition to its main location in Brooklyn, NYU Tandon collaborates with other schools within NYU, one of the country's foremost private research universities, and is closely connected to engineering programs at NYU Abu Dhabi and NYU Shanghai. It operates Future Labs focused on start-up businesses in downtown Manhattan and Brooklyn and an award-winning online graduate program. For more information, visit http://engineering.nyu.edu.

www.facebook.com/nyutandon
@NYUTandon

 

 

NYU Tandon School of Engineering Logo (PRNewsFoto/NYU Tandon School of Engineering)

Cision View original content to download multimedia: http://www.prnewswire.com/news-releases/breakthrough-reported-in-fabricating-nanochips-300783138.html

SOURCE NYU Tandon School of Engineering

Contact:
Company Name: NYU Tandon School of Engineering
Kathleen Hamilton, 646.997.3792 / mobile 347.843.9782
Email Contact
Web: https://engineering.nyu.edu

Featured Video
Jobs
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise