Aldec to showcase Verification Spectrum for SoC FPGAs at Embedded World 2018
Today’s SoC FPGAs present new verification challenges for system, software and hardware teams. Various issues related to HW/SW integration continue to increase, and yet they are only typically found in the FPGA testbed, which are costly to fix and often result to significant project delays.
With Aldec’s 34+ year expertise in FPGA and ASIC verification, the Verification Spectrum is an end-to-end solution that provides best-practice verification methodologies, coding standards, integrated tools and FPGA prototyping boards that supports the Continuous Integration development flow.
Event: February 27 - March 1, 2018, Nuremberg, Germany
Verification Spectrum to be showcased at Booth 4-560:
- Mixed-Language RTL Simulator with Riviera-PRO™ - Supporting the latest VHDL, Verilog, SystemVerilog and UVM with 32/64-bit functional and timing simulation. Integrated with FPGA vendor development tools such as Xilinx® Vivado™ and Intel® Quartus™.
- Design Rule Checking and CDC/RDC Analysis with ALINT-PRO™- A single platform that provides DRC and CDC/RDC analysis with a rich set of HDL coding standards for unit and chip-level linting.
- Traceability Management with Spec-TRACER™- Automates traceability creation from functional specification to SW and HW design source code, verification plan, testbench and test results.
- HW/SW Co-Simulation Solution with QEMU and Riviera-PRO - System integration and simulation of FPGA custom IPs with software running on the SoC processor is simplified with the Aldec QEMU Bridge that connects open-source QEMU (co-emulator) and Riviera-PRO.
- SoC FPGA Prototyping Platform with TySOM™- Small form-factor prototyping boards for embedded designers who require high-performance re-configurable SoCs for embedded vision applications (ADAS, surveillance and multimedia) and networking solutions.
About Aldec
Aldec Inc., headquartered in Henderson, Nevada, is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, SoC and ASIC Emulation/Prototyping, Design Rule Checking, CDC/RDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification, Embedded Solution, High-Performance Computing and Military/Aerospace solutions. www.aldec.com