Arastu Systems announces LPDDR3/4 Single Controller for optimal performance

June 21st, 2017, San Jose, CA – High-end computing applications requires Higher Performance keeping the Power and Latency intact. Arastu Systems, a product engineering services company, today announced the immediate availability of LPDDR3/4 DRAM Memory Controller Core. The IP is highly configurable and delivers performance up to 4266 MT/s.

Dual DRAM Controller Core for LPDDR3 and LPDDR4 is as designed as per the respective JEDEC standards and is compatible with DFI3.1/4.0 PHY or a PHY from any vendor. It supports all key LPDDR3/4 features such as various frequency ratios, programmability to achieve minimum latency, multiple channels with a privilege to configure each channel independently, multiple power down modes, parameterized data widths and many more.

Upon successful implementation of LPDDR4 Controller, Arastu Systems developed LPDDR3/4 joint solution in order to meet customer needs. SoC designers who are planning to run the design at multiple speeds can leverage Arastu Systems’ LPDDR3/4 IP core and will have the benefit of supporting wide range of system application using the same design. The user can configure the IP core by parameter for LPDDR3/4, based on which the hardware for the controller is generated.

“We are gradually moving in an era where end user systems are becoming highly intelligent and performing complex functions seamlessly”, Umesh Patel, CEO, Arastu Systems. “Arastu’s team is playing a small but key role by empowering such systems with highly efficient LPDDR Memory Solutions”.

For more information regarding the Arastu Systems LPDDR3/4 DRAM Memory Controller please visit,  https://www.design-reuse.com/sip/lpddr3-4-dram-memory-controller-ip-42683/, else send an email to,  Email Contact .



Contact:

Harsh Parikh, Manager, Marketing
Email Contact
+1-408-223-2374

Featured Video
Editorial
More Editorial  
Jobs
CAD Engineer for Nvidia at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise