WHO: The
Electronic System Design Alliance (ESD Alliance), an international association of companies providing goods and services throughout the semiconductor design ecosystem
WHAT: Will present an informational panel, "Energy Policy and Strategy for the IoT Era," to outline the new rules for PCs set by the California Energy Commission (CEC). It will be moderated by Grant Pierce, chief executive officer (CEO) of Sonics, Inc. and chairman of the ESD Alliance board of directors.
WHEN: Thursday, March 23, beginning at 6 p.m. with networking, light snacks and drinks, concluding at 9 p.m.
WHERE: San Jose City Hall Rotunda. 200 East Santa Clara Street, San Jose, Calif.
The program will explain the CEC's new energy efficiency rules and regulations for PCs and monitors, and give panelists a chance to provide their perspectives. A panel discussion and audience Q&A session will follow. Panelists include:
- Ned Finkle, vice president of External Affairs at NVIDIA
- Vojin Zivojnovic, founder and CEO of AGGIOS
- Dave Ashuckian, CEC's deputy director of the Efficiency Division
- Pierre Delforge, director, High Tech Sector Energy Efficiency of the Natural Resources Defense Council (NRDC)
- Vic Kulkarni, ANSYS' senior vice president and general manager of the RTL Power Business
- Shahid Sheikh, director in Government and Policy Group with Intel Corporation
- Lip-Bu Tan, Cadence's president and CEO
Ashuckian and Delforge will explain how the rules came about and why they are necessary, how much energy they will save, when they will take effect and how they will be enforced. They will address what the rules mean for manufacturers and the supply chain and their implications for broader national and global energy efficiency standards for electronic products, particularly as it relates to the emerging IoT market.
Attendees will learn about potential new technical innovations in design and manufacturing, insights into energy efficiency and what impact the rules will have on their companies' as well as industries' energy policies and strategies. Panelists will attempt to determine how the new rules could affect the economy.
The panel is open free of charge to all ESD Alliance member companies. Non-members are welcome to attend for a fee of $40. More details and registration information can be found at: http://bit.ly/2mdHKpH
About the Electronic System Design Alliance
The
Electronic System Design (ESD) Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem, is a forum to address technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design industry as a vital component of the global electronics industry. For more information about the ESD Alliance, visit
http://www.esd-alliance.org
All trademarks and registered trademarks are the property of their respective owners.
For more information, contact: Nanette Collins Public Relations for the ESD Alliance (617) 437-1822 Email Contact