Gartner Says Worldwide Semiconductor Capital Spending to Decline 0.3 Percent in 2016

Worldwide semiconductor capital spending is projected to decline 0.3 percent in 2016, to $64.6 billion, according to Gartner, Inc. (see Table 1). This is up slightly from the estimated 0.7 percent decline in Gartner's previous quarterly forecast. The market is expected to return to growth in 2017, increasing 7.4 percent.

"As we enter the final quarter of 2016, we find growth returning to the semiconductor manufacturing industry, with a slightly improved capital investment outlook for 2016 from the last quarter's forecast," said David Christensen, senior research analyst at Gartner. "The outlook for equipment has improved significantly as logic manufacturers focus their spending on ramping fabs for the introduction of high-volume 10-nanometer production in 2017 and memory producers are focusing on the move to 3D NAND flash."

China remains something of a wild card, after the announcement of multiple fab projects that will aid overall growth through the end of the decade, while a stronger U.S. dollar in 2016 will remain a key factor in determining revenue growth of semiconductor manufacturers.

Table 1: Worldwide Semiconductor Capital Spending and Equipment Spending Forecast, 2015-2018 (Millions of Dollars) 

 

2015

2016

2017

2018

Semiconductor Capital Spending ($M)

 

64,750.8

 

64,586.5

 

69,342.9

 

71,265.2

Growth (%)

0.3

-0.3

7.4

2.8

Wafer-Level Manufacturing Equipment ($M)

 

33,248.1

 

35,383.1

 

37,701.7

 

38,695.7

Growth (%)

-1.1

6.4

6.6

2.6

Wafer Fab Equipment ($M)

31,485.4

33,557.1

35,695.0

36,460.4

Growth (%)

-1.3

6.6

6.4

2.1

Wafer-Level Packaging and Assembly Equipment ($M)

 

1,762.7

 

1,825.9

 

2,006.6

 

2,235.3

Growth (%)

4.1

3.6

9.9

11.4

Source: Gartner (October 2016)

As with previous years, smartphones, mobile devices, solid-state drives (SSDs) and the Internet of Things (IoT) will remain the principal drivers of the semiconductor market for the immediate future, particularly for foundries that manufacture most of the wafers of logic chips for these devices. Although unit shipments of smartphones have slowed down, the fast migration to 4G LTE in high-end smartphones has driven the wafer demand of advanced process technologies, while the adoption of fingerprint sensors, touch display drivers and active-matrix dynamic light-emitting diodes (AMOLEDs) by Chinese smartphones has made full use of 200mm foundries' 0.18-micron capacity.

From a device perspective, DRAM conditions in the first half of 2016 were worse, but the market hit bottom at midyear. There is now tightening supply, and better demand has pulled the market into an undersupply for the second half of the year. At the start of 2017, a weaker demand environment will create a brief technical oversupply, but the industry will then move back into an undersupply for the remainder of 2017 and into 2018.

After nearly three years of oversupply, there was a pronounced shortage of NAND in the third quarter of 2016, and 3D NAND production ramp challenges persist. 2017 is expected to see a favorable supply/demand balance that loosens up by the end of the year. Substantial capacity additions during the second half of the year along with 3D NAND technology maturation from some vendors will contribute to the favorable supply/demand balance. 2016 spending on wafer-level manufacturing equipment will be up 6.4percent, driven by logic manufacturers ramping to 10nm and memory players moving to 3D NAND.

This research is produced by Gartner's Semiconductor Manufacturing program. This research program, which is part of the overall semiconductor research group, provides a comprehensive view of the entire semiconductor industry, from manufacturing to device and application market trends. Gartner clients can see more in "Forecast: Semiconductor Capital Spending, Worldwide, 3Q16 Update."

Contacts

Amy Ann Forni
Gartner
amy.forni@gartner.com
Rob van der Meulen
Gartner
Email Contact

Featured Video
Jobs
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise