Synopsys' 10 Gbps USB 3.1 IP First to Pass USB-IF Certification

USB-IF Certified IP Ensures Interoperability and Lowers Integration Risk for High-Performance, Low-Power SoC Designs

MOUNTAIN VIEW, Calif., Feb. 3, 2016 — (PRNewswire) —

Highlights:

  • Synopsys' 10 Gbps DesignWare USB 3.1 controller and PHY passed all protocol, electrical and interoperability tests to become the first IP to achieve USB-IF certification
  • DesignWare USB 3.1 PHYs consume less than 50 mW power at 10 Gbps speeds in 14/16-nm FinFET process technologies
  • DesignWare USB 3.1 Host, Device and Dual-Role Device Controllers are backward-compatible with DesignWare USB 3.0 software stacks and device class protocols, enabling designers to reuse code and save months of software development time
  • Complete USB 3.1 solution, including, controllers, PHYs, verification IP, IP subsystems, IP prototyping kits and IP software development kits reduce the time and effort of integrating the IP into SoCs

Synopsys, Inc. (Nasdaq: SNPS) today announced that it is the first to achieve SuperSpeed USB 10 Gbps (USB 3.1 Gen 2) IP certification from the USB Implementers Forum (USB-IF). To attain certification, the Synopsys DesignWare® USB 3.1 Controllers and PHYs passed all of the USB-IF protocol, electrical and interoperability tests for SuperSpeed USB 10 Gbps (USB 3.1 Gen 2), SuperSpeed USB (USB 3.1 Gen 1) and Hi-Speed USB (USB 2.0, 480 Mbps). With certified IP, designers can integrate proven USB 3.1 functionality into their SoCs and be confident that the products they submit for certification will meet USB-IF criteria, enabling faster time-to-market for their products.

SuperSpeed USB 10 Gbps (USB 3.1 Gen 2) delivers more than twice the effective data throughput performance of SuperSpeed USB 3.0 (USB 3.1 Gen 1). The DesignWare USB 3.1 Controllers and PHYs are optimized for low power, meeting the stringent requirements of mobile devices such as smartphones and tablets, high-volume consumer applications such as digital TVs, and storage and networking applications. The DesignWare USB 3.1 Controller IP implements power management features that help extend battery life, including standard USB power savings modes and controller hibernation. The IP supports the IEEE 1801 standard Unified Power Format (UPF) for low-power SoC design flows. The controllers are backward-compatible with DesignWare USB 3.0 software stacks and device class protocols, enabling designers to reuse their existing software code, saving months of software development time. The PHYs offer high-performance 10 Gbps and 5 Gbps data transfer rates and consume less than 50 mW of power at 10 Gbps speeds.

"Certification for SuperSpeed USB 10 Gbps IP is a critical milestone in the development and widespread adoption of the next level of USB performance," said Jeff Ravencraft, USB-IF president and COO. "Synopsys has been an active contributor to USB-IF for more than 15 years, helping to define and drive USB specifications. By being the first company to achieve certification for SuperSpeed USB 10 Gbps IP, Synopsys continues to help designers incorporate the latest USB performance into their designs, while helping to ensure interoperability and connectivity with billions of USB-enabled devices worldwide."

"Through every generation of USB from 1.1 to 3.1, Synopsys has made significant investments in ensuring standards compliance and interoperability of our IP to help designers lower their integration risk," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "As the industry moves to 10 Gbps USB performance for their next-generation products, they can rely on Synopsys for certified IP as well as IP prototyping kits, IP software development kits and IP subsystems to help them successfully deliver high performance, low power SoCs to the market."

Availability

The DesignWare USB 3.1 controllers, PHYs, verification IP, IP subsystems, IP Prototyping Kits and IP Virtualizer™ Development Kits are available now.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contacts:
Monica Marmie
Synopsys, Inc.
650-584-2890
Email Contact

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/synopsys-10-gbps-usb-31-ip-first-to-pass-usb-if-certification-300214299.html

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com

Featured Video
Jobs
CAD Engineer for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Upcoming Events
Phil Kaufman Award Ceremony and Banquet to be held November 6 at Hayes Mansion at Hayes Mansion 200 Edenvale Ave San Jose CA - Nov 6, 2024
SEMICON Europa 2024 at Messe München München Germany - Nov 12 - 15, 2024
DVCon Europe 2023 at Holiday Inn Munich – City Centre Munich Germany - Nov 14 - 15, 2024
SEMI MEMS & Imaging Sensors Summit, at International Conference Center Munich Germany - Nov 14, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise