"To simplify the verification of complex Imagination IP, we've chosen an integrated verification strategy where emulation is an essential technology," said Martin Ashton, EVP, PowerVR, Imagination Technologies. "The Veloce TBX technology delivers a total solution with inherent flexibility, which was essential for us to achieve first-pass silicon success on the PowerVR Wizard GR6500 design."
The transaction-based Veloce TBX technology, which is part of the Veloce OS, delivers high verification throughput, flexible verification use models, and increased debug efficiency. In terms of performance improvements, with the Veloce TBX technology Imagination improved test repeatability during regression testing to a point that is far superior to the non-deterministic regression tests running in an In-circuit Emulation (ICE) mode. Imagination also saw increased performance based on optimized memory access and concurrent modelling techniques supported by the Veloce TBX technology.
Another key benefit for Imagination was Mentor's uniquely developed capability to support Imagination's 64-bit drivers with the Veloce emulation platform. There was no need to change to custom target hardware for 64-bit operation, which meant that schedules were not adversely affected while waiting for new hardware. This capability also made for more efficient platform integration, allowing for a mix of any CPU architecture and associated operating system and for streamlined software driver code development with the ability to execute real content.
"We are pleased by the progress Imagination and Mentor have made over the last years in the use of the Veloce emulation platform to make verification more effective and flexible," said Eric Selosse, vice president and general manager of the Mentor Emulation Division. "Imagination has worked to refine a verification flow that not only benefits them internally but also benefits their ecosystem partners who chose to design with Imagination IP."
About the Veloce Emulation platform
The Veloce emulation platform is a core technology in the Mentor® Enterprise Verification Platform™ (EVP) – a platform that boosts productivity in ASIC and SoC functional verification by combining advanced verification technologies in a comprehensive platform.
The Veloce emulation platform's success is a result of several factors: high design capacity, speed of execution, and exceptional functionality. Now considered among the most versatile and powerful of verification tools, emulation is used by project teams for hardware debugging, hardware/software co-verification or integration, system-level prototyping, low-power verification and power estimation and performance characterization.
About Mentor Graphics
Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year in excess of $1.24 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
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Mentor Graphics, Mentor and Veloce are registered trademarks, and Enterprise Verification Platform is a trademark, of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.
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