eSilicon Optimizes IP for Cost-Effective 2.5D Integration

SAN JOSE, CA -- (Marketwired) -- Jan 08, 2015 --


Who: Lisa Minwell, senior director of marketing for the eSilicon IP Solutions Group

What: Keynote presentation: Optimizing IP for Cost-effective 2.5D Integration

Where: MEPTEC luncheon, Biltmore Hotel, Santa Clara

When:
Wednesday, January 14, 2015
Registration: 11:30am
Presentation: 12:00-1:15pm

Abstract:
Heterogeneous integration on silicon interposers provides a viable solution to the demand in the computer and consumer electronics markets for higher processing speed, lower power and increased functionalities. Lisa Minwell of eSilicon will discuss technologies and techniques for optimizing 2.5D designs for power and cost effectiveness.

About Lisa Minwell
As senior director of marketing, IP Solutions Group, eSilicon Corporation, Lisa Minwell is responsible for the company's physical IP product portfolio. Before joining eSilicon, Lisa was product marketing manager for memory products at Synopsys, Inc. and director of product marketing for Virage Logic's memory products. She held various design and managerial positions with Motorola, Inc., where her experience included memory compiler development, SRAM design engineering, CAD and IT management and research and development of DRAM and EEPROMs. Lisa holds a Bachelor of Science in Microelectronic Engineering from the Rochester Institute of Technology, Rochester, New York.

About eSilicon
eSilicon, a leading independent semiconductor design and manufacturing solutions provider, delivers custom ICs and custom IP to OEMs, independent device manufacturers (IDMs), fabless semiconductor companies (FSCs) and wafer foundries through a fast, flexible, lower-risk, automated path to volume production. eSilicon serves a wide variety of markets including communications, computer, consumer, industrial products and medical. www.esilicon.com

eSilicon -- Enabling Your Silicon Success™

eSilicon is a registered trademark, and the eSilicon logo and Enabling Your Silicon Success are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

Contacts:

Sally Slemons 
eSilicon Corporation 
408.635.6409 

Email Contact

Susan Cain 
Cain Communications 
408.393.4794

Email Contact 


Featured Video
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
Phil Kaufman Award Ceremony and Banquet to be held November 6 at Hayes Mansion at Hayes Mansion 200 Edenvale Ave San Jose CA - Nov 6, 2024
SEMICON Europa 2024 at Messe München München Germany - Nov 12 - 15, 2024
DVCon Europe 2023 at Holiday Inn Munich – City Centre Munich Germany - Nov 14 - 15, 2024
SEMI MEMS & Imaging Sensors Summit, at International Conference Center Munich Germany - Nov 14, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise