Calypto December 2014 Newsletter

blastHeaderlogo4_0414V1line.png

 
Read More

We are pleased to announce the launch of the Catapult 8 platform, a third-generation, high-level synthesis (HLS) technology – the first in the industry.

Catapult 8 Third Generation HLS

The Catapult 8 platform is the result of a significant investment by Calypto to deliver a new generation of HLS technology, while still supporting and enhancing the prior product until customers were ready to transition to the new architecture. In fact, it has been in development for three years, in testing with customers for more than a year, and now widely deployed. Read about why it’s a 3rd generation technology here!

New Synthesizable Library for Catapult

Available with the Catapult 8 platform is the new Catapult Catware library, an extensive source code library of synthesizable functions such as filters and FFTs, provided in SystemC and C++. Continue reading about Catware here!

2014 High Level Synthesis Survey Report

I would also like to update you with our annual HLS Survey Report. As you may know, every year we sponsor 3rd party research that asks engineers worldwide about current challenges. This year we focused on verification challenges and HLS.

Upcoming Events

If you are planning visits to DATE or DVCon, please check out the following information. The DATE paper "Clock Domain Crossing Aware Sequential Clock Gating" is a paper based on the collaboration between Calypto and Samsung. The paper featured at DVCon includes technical information about addressing RTL verification closure with a HLS design methodology.

Mark Milligan
Email Contact
Vice President of Marketing
Calypto Design Systems
calypto.com

Featured Video
Editorial
More Editorial  
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
CAD Engineer for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise