Docea Power to Reveal Aceplorer PI and the ThermalProfiler to Speed Up Power-Oriented Decisions and Thermal Exploration and Verification at DAC51

Grenoble, France and San Jose, CAMay 20, 2014Docea Power, the provider of system level power and thermal exploration solutions, will reveal two new products at the 51st Design Automation Conference (DAC). Docea Power will demonstrate the ThermalProfiler a software solution for fast thermal exploration and verification, and the Aceplorer Power Intelligence platform (Aceplorer PI) to secure and speed-up power oriented decisions.

The Aceplorer PI platform is an innovative solution to capitalize and turn power data into an asset across and beyond functional organizations.  It significantly improves the decision process by providing simulation data for multiple scenario and system configurations. It enhances productivity through a power-oriented collaborative platform offering features like exploration, versioning and automated reporting from a single user interface. The scalability is supported by a big data infrastructure. The solution is targeted at HW/SW power architects and power-influenced decision makers who need to manage multiple SoC or platform projects and derivatives. The Aceplorer PI platform uses the paradigms developed for business intelligence solutions and applies them to system level power modeling and simulation.

The ThermalProfiler is a new solution to explore various thermal and floorplans configurations and then simulate dynamic power traces coming from other tools or measurements. It addresses the need for more interactivity between thermal experts and design teams. For an increasing number of thermally constrained devices a larger number of what-if analysis simulations are needed that require fast coupled power and thermal simulations in the time domain. The ThermalProfiler can be used by both thermal experts and system architects or power lead engineers to achieve specification and to speed up verification.

In addition, Docea Power solutions for thermal modeling will be presented in the following events during the conference:

  • DESIGNER TRACK SESSION 16: Thermal Modeling Methodology for Fast and Accurate System Level Analysis. Application to a Memory-on-Logic 3D circuit.
    • When/Where: Tuesday, June 3, 2014 from 10:30am to 12:00pm, room 105
    • Who: Pascal Vivet, CEA-LETI, Grenoble, France
  • SESSION 6W WORKSHOP: DAC Workshop on System to Silicon Performance Modeling and Analysis
    • TRACK: EMBEDDED SYSTEMS, TOPIC AREA: EMBEDDED SYSTEM DESIGN,
    • When/ Where: Thursday June 05, 9:00am - 5:00pm | Room 202
    • Who:  Gene Matter, Sylvian Kaiser, Docea Power, San Jose, CA, Moirans, France

PRODUCT DEMONSTRATIONS 

When/Where

Monday-Wednesday, June 2-4, 2014, 9 am to 6 pm
Docea Booth #2223
Moscone Convention Center, San Francisco, CA

Information and Registration

To request a private demo, please register here
To schedule a meeting with Docea Power, please email Ridha.hamza (a)doceapower.com or call:
(US) (408) 351 3407 or (France) +33 4 27 85 82 97

About Docea Power

Docea Power develops and commercializes a new generation of methodology and tools for enabling faster more reliable power and thermal modeling at the system level. Based on its Aceplorer platform, the Docea Power solutions use a consistent approach for executing architecture exploration and optimizing power and thermal behavior of electronic systems at an early stage of any electronic design project. The company is headquartered near Grenoble, France, and in San Jose, CA, and has sales and application support offices in Japan and Korea. For more information, please visit www.doceapower.com.

Press contacts

Chantal Cochini, l’Ops PR, +33(0)1 42 71 30 93, Email Contact

All trademarks or trade names are the properties of their respective owners.

Featured Video
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
CAD Engineer for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise