SANTA CLARA, Calif. — (BUSINESS WIRE) — January 28, 2014 — Rambus Inc. (NASDAQ: RMBS):
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Who: |
Rambus Inc. (NASDAQ: RMBS) | ||
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Where: |
DesignCon | ||
| Santa Clara Convention Center – Booth #301 | |||
| 5001 Great America Parkway, Santa Clara, Calif. | |||
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When: |
January 28 - 31, 2014 |
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At DesignCon 2014, Rambus engineers and scientists will present two papers on the latest research in ultra-high speed interface design and deliver training on the latest low-power, high-performance memory solutions.
Additionally, Rambus will be demonstrating various IP cores, tools and emerging architectures designed to deliver robust and easy to integrate solutions in its booth (#301), including: the LabStation™ validation platform, R+™ LPDDR3, and R+ technologies for extending main memory beyond DDR4.
Click to Tweet: @rambusinc will be exhibiting, speaking and demonstrating at @UBMDesignCon 2014 on 1/28-31#Innovation
Paper Presentations:
Title: “An Implementer’s Guide to Low-Power and High-Performance
Memory Solutions”
Rambus Speakers/Authors: Scott Best,
Wendem Beyene, Ming Li
Date: Tuesday, January 28, 2014
Time:
9:00 a.m.-12:00 p.m.
This session provides an in-depth analysis of standard DRAM memory solutions for low-power and high-performance applications. Specifically, the session will cover the interactions between signaling, clocking and packaging technology of a memory interface, and how this knowledge can be used to analyze and compare different popular memory interfaces for different applications including mobile, compute, graphics, and server.
