Dolphin Integration offers first standard cell library to enable a leakage reduction of 1/350 at 65 and 55 nm

Grenoble, France - Oct 18, 2013 ---- Dolphin Integration, the innovator of Virtual Components for density and power optimized subsystems, announces the SESAME BIV standard cell library as a major innovation for ultra low leakage always-on logic block.

SESAME BIV standard cell library extends the RCSL offer (Reduced Cell Stem Libraries) by delivering a leakage reduction of 1/350 for a silicon footprint up to  7x denser for a 5,000-gate block implemented with a usual HVT standard cell combined with its dedicated low quiescent linear regulator.

SESAME BIV is ideal for always-on clock islets such as real-time clocks (RTC) as well as RF or voice awakening devices.

SESAME BIV incorporates the key features needed for such always-on logic islets:

  • A patented Flip Flop to reliably sustain operating voltage range from 1.2 V up to 3.3 V, eliminating the need for a voltage regulator
  • A design based on 2.5 V transistors with overdriven thick gates and 10-track cells to get a higher density
  • Data retention guaranteed at very low voltage (e.g. 0.5 V at 65 nm) for ultimate power savings

Decreasing power is a global requirement requiring diverse solutions where SESAME BIV illustrates Dolphin Integration’s commitment to go beyond a standard offering for low leakage. SESAME BIV enables an innovative but safe, energy efficient, and dense implementation of critical logic”, announces Elsa BERNARD-MOULIN, Library Marketing Manager. “We are glad to announce that Customers of major foundries such as TSMC and Global Foundries have already selected this SESAME BIV”.

For more information on the key benefits and performances of SESAME BIV standard cell library, have a quick look on  our catalog.

Featured Video
Editorial
More Editorial  
Jobs
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise