Atrenta Launches RTL Signoff Seminars in Asia

Full-day free event presents technology platform required for true RTL signoff

SAN JOSE, Calif. — (BUSINESS WIRE) — September 17, 2013Atrenta Inc., the leading provider of SoC Realization solutions for the semiconductor and consumer electronics industries, announced today additional details about its series of RTL signoff seminars being held in Beijing, Shanghai, Hsinchu and Seoul.

The day-long seminars present details of all the technologies required to implement a true RTL signoff flow. Clock Domain Crossing (CDC) analysis, verification completeness, power analysis, timing constraint checking, testability analysis and programmed RTL restructuring are all presented in detail, with practical examples of how these technologies are used to implement reliable IP and SoC level RTL signoff flows.

Executive staff from Atrenta’s Asia Pacific team will be present, as well as local technical experts and product marketing owners from Atrenta’s corporate headquarters in San Jose, CA. Customer testimonials are also planned.

To find out more details about dates and locations and to sign up for one of these free seminars, visit http://www.atrenta.com/AsiaSeminars2013/.

About Atrenta

Atrenta’s SpyGlass Predictive Analyzer® significantly improves design efficiency for the world’s leading semiconductor and consumer electronics companies. Patented solutions provide early design insight into the demanding performance, power and area requirements of the complex system on chips (SoCs) fueling today’s consumer electronics revolution. More than two hundred companies and thousands of design engineers worldwide rely on SpyGlass to reduce risk and cost before traditional EDA tools are deployed. And with the addition of BugScope™ verification efficiency is also enhanced, allowing engineers and managers to find the fastest and least expensive path to silicon for complex SoCs.

SpyGlass from Atrenta: Insight. Efficiency. Confidence. www.atrenta.com

*******************************************************

© 2013 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass and SpyGlass Predictive Analyzer are registered trademarks and BugScope is a trademark of Atrenta Inc. All others are the property of their respective holders.

This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.



Contact:

Atrenta:
Charu Puri, +1-408-453-3333
Email Contact
or
Atrenta PR Agency:
Lee PR
Liz Massingill, +1-650-363-0142
Email Contact

Featured Video
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
Phil Kaufman Award Ceremony and Banquet to be held November 6 at Hayes Mansion at Hayes Mansion 200 Edenvale Ave San Jose CA - Nov 6, 2024
SEMICON Europa 2024 at Messe München München Germany - Nov 12 - 15, 2024
DVCon Europe 2023 at Holiday Inn Munich – City Centre Munich Germany - Nov 14 - 15, 2024
SEMI MEMS & Imaging Sensors Summit, at International Conference Center Munich Germany - Nov 14, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise