Programming on-board flash and EEPROM memory at SPI bus speeds from an FPGA is explained in new eBook

Richardson, TX (Sept. 4, 2013) – Designers and manufacturing engineers face challenges when it comes to programming flash and EEPROM memories that are already soldered to a circuit board. Often, the software or firmware content of these memories has not yet been completed when hardware prototypes are being validated and tested prior to volume manufacturing. As a result, the memories must be programmed and sometimes reprogrammed in-system and as quickly as possible, especially in manufacturing.

A new eBook by ASSET® InterTech ( www.asset-intertech.com), the leading supplier of tools for embedded instrumentation, explains the pros and cons of several different methods for programming memory devices connected to the Serial Peripheral Interface (SPI) bus. Each method takes advantage of a Field Programmable Gate Array (FPGA) that is already on the board for functional purposes.

“It’s important to be able to program SPI memory devices in-system because removing a device from a board to program it just takes too long and the memory device is often damaged in the process,” said Kent Zetterberg, product manager at ASSET and author of the eBook. “And once the circuit board design moves into manufacturing, you’ll want to be able to program memory as quickly as possible because in manufacturing, time is money.”

At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG” is available now on the ASSET
website at: http://www.asset-intertech.com/Footer/eBooks/At-speed-SPI-Flash-EEPROM-Programming-FPGA-JTAG

Other informative eBooks, white papers and videos on issues relating to chip, board and system debug, validation and test can be downloaded from: http://www.asset-intertech.com/News/White-Papers

About ASSET InterTech

ASSET InterTech is a leading supplier to the electronics industry of tools based on embedded instrumentation. Its ScanWorks® platform overcomes the limitations of external test and measurement equipment by applying instrumentation embedded in semiconductors to perform chip and circuit board debug, design validation, manufacturing test and field support. ASSET’s
recent acquisition of Arium, Inc., adds a powerful suite of firmware debug and trace tools to the ScanWorks platform. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

Follow us on:

Facebook:        https://www.facebook.com/ASSETInterTech

LinkedIn:        http://www.linkedin.com/company/asset-intertech-inc.

Twitter:           https://twitter.com/ASSETInterTech

You Tube:       http://www.youtube.com/ASSETInterTech

Our blog – Test Data Out:      http://blog.asset-intertech.com/

########



Featured Video
Jobs
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise