IGLOO2 FPGAs Offer Lowest System Cost, Best-in-class Integration, Low Power, Reliability and Security
ALISO VIEJO, Calif., June 18, 2013 — (PRNewswire) — Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today unveiled its IGLOO®2 field programmable gate array (FPGA) family for industrial, commercial aviation, defense, communications and security applications. The non-volatile flash-based IGLOO2 FPGAs have the highest number of mainstream FPGA features including general purpose input/outputs (GPIOs), 5G SERDES interfaces, and PCI Express® endpoints of any similar device on the market today, and feature the industry's only high-performance memory subsystem.When compared to other 5G SERDES-based FPGAs under 150K logic elements (LEs), IGLOO2's high level of integration provides the lowest total system cost versus competitive FPGAs while improving reliability, significantly reducing power and systematically protecting valuable customers' design IPs.
The IGLOO2 FPGA family requires only two power supplies, versus three for competitive devices. Additionally, the non-volatile configuration of IGLOO2 eliminates the requirement for external flash memory, providing the system architect with a higher level of system integration, performance and reliability.
Microsemi has already engaged with lead customers who plan to use IGLOO2 in a broad range of products including industrial controllers, Ethernet switches, FADEC engine controllers, missile systems, and other applications.
"Our new IGLOO2 FPGAs feature an unparalleled level of functionality, which allows us to address a broader range of opportunities as well as expand our presence in key vertical markets where Microsemi has a strong footprint," said Esam Elashmawi, vice president and general manager of Microsemi's SoC product group. "With our comprehensive product portfolio, Microsemi is the only semiconductor company to offer programmable solutions, analog, digital and mixed-signal ICs under one umbrella. This unique strategic advantage allows us to provide our customers with system-level solutions that lower bill-of-material costs and power consumption in a wide range of products.
"The IGLOO2 FPGA family follows the successful launch of our SmartFusion®2 SoC FPGAs last year, which are shipping to customers now," Elashmawi continued. "The launch of two major FPGA families within a year exemplifies Microsemi's continued commitment to invest in industry leading advanced SoC and FPGA products."
About the IGLOO2 FPGAs
Microsemi's IGLOO2 FPGAs address industry needs for mainstream FPGA features by providing a LUT-based fabric, 5G transceivers, high-speed GPIO, block RAM and DSP blocks in a differentiated, cost- and power-optimized architecture. The new IGLOO2 FPGA architecture offers up to five times more logic density and three times more fabric performance than the previous generation IGLOO family.
The IGLOO2 family offers best-in-class mainstream FPGA features including:
- highest number of GPIOs for any given density node for 5G SERDES FPGAs;
- highest number of 5G transceivers density;
- highest number of PCI compliant 3.3V I/Os in the industry; and
- highest number of PCIe endpoints.
For cost-optimized FPGAs below 150K LEs, IGLOO2 provides the high level of I/O and SERDES integration—which is necessary for I/O expansion, bridging, system management and co-processing— allowing customers to use smaller devices for I/O expansion and bridging solutions. This, coupled with the need for only two power supplies and no external configuration devices, reduces overall system cost and board complexity.
For the vast number of applications in the communications, industrial, defense and aviation markets that require highly integrated premium features for I/O expansion, bridging and co-processing at a lower cost, IGLOO2 provides a best-in-class solution.
IGLOO2's FPGA features are complemented by a unique built-in high-performance memory subsystem (HPMS) that embeds common user functions such as the industry's largest monolithic embedded SRAM memory blocks. These memories provide fast, predictable low latency to time critical embedded applications such as video, embedded graphics functions and real time Ethernet. Included in the HPMS is up to 512Kbytes of flash memory which allows users to store pertinent system data such as Ethernet MAC IDs, user keys, system configuration and system personalization data. This feature also enables secure boot functions for industry leading processors by storing secondary boot loaders securely on-chip. In addition, the HPMS integrates two DMA controllers and a two-port memory cache (DDR bridges) to efficiently move data within and in-and-out of IGLOO2 to external DDR3 memories for these embedded time critical applications.
Low Power
The IGLOO2 FPGA family delivers the industry's lowest static power by providing 10 times lower static power than comparable FPGAs by utilizing a unique Flash*Freeze real-time power management mode.
Security
To protect valuable customer IP, the family includes built-in design security for all devices including root-of-trust applications. Additionally, IGLOO2 FPGAs continue Microsemi's dominance in SEU immunity due to the inherently reliable flash-based FPGA fabric, ideal for safety critical, mission critical and high temperature systems. IGLOO2 FPGAs are tailored to customers' needs by offering more resources on a smaller device.
IGLOO2 Family
|
Features |
M2GL005 |
M2GL010 |
M2GL025 |
M2GL050 |
M2GL090 |
M2GL100 |
M2GL150 |
Logic/DSP |
Maximum Logic Elements (4LUT + DFF)* |
6,060 |
12,084 |
27,696 |
56,340 |
86,316 |
99,512 |
146,124 |
Math Blocks (18x18) |
11 |
22 |
34 |
72 |
84 |
160 |
240 | |
PLLs and CCCs |
2 |
6 |
8 | |||||
SPI/HPDMA/PDMA |
1 each | |||||||
Security |
AES256, SHA256, RNG |
AES256, SHA256, RNG, ECC, PUF | ||||||
Memory |
eNVM (K Bytes) |
128 |
256 |
512 | ||||
LSRAM 18K Blocks |
10 |
21 |
31 |
69 |
109 |
160 |
236 | |
uSRAM1K Blocks |
11 |
22 |
34 |
72 |
112 |
160 |
240 | |
eSRAM (K Bytes) |
64 | |||||||
Total RAM (K bits) |
703 |
912 |
1104 |
1826 |
2586 |
3552 |
5000 | |
High Speed |
DDR Controllers |
1x18 |
2x36 |
1x18 |
2x36 | |||
SERDES Lanes |
0 |
4 |
8 |
4 |
8 |
16 | ||
PCIe End Points |
0 |
1 |
2 |
4 | ||||
User I/Os |
MSIO (3.3V) |
115 |
123 |
157 |
139 |
306 |
292 |
292 |
MSIOD (2.5V) |
28 |
40 |
40 |
62 |
40 |
106 |
106 | |
DDRIO (2.5V) |
66 |
70 |
70 |
176 |
66 |
176 |
176 | |
Total User I/O |
209 |
233 |
267 |
377 |
412 |
574 |
574 |