Award Honors Outstanding Achievement in EDA and IP Standards

NAPA, Calif. -- November 15, 2012 -- Nominations are being accepted now through Friday, January 18 for the 2013 Technical Excellence Award sponsored by Accellera Systems Initiative (Accellera). The Award recognizes outstanding contributions in the creation of electronic design automation (EDA) and intellectual property (IP) standards by a member of an Accellera technical committee. Standards created by Accellera are contributed to the IEEE Standards Association for formal standardization and ongoing control.

Any individual who is a member of an Accellera technical committee is eligible to receive the award. Candidates may be nominated by the industry at large and are endorsed by Accellera committee members. Award nominations are due January 18, 2013. To nominate an individual, visit: http://www.accellera.org/about/awards/.

The Technical Excellence Award will be presented during a luncheon at Accellera Systems Initiative day, a featured part of DVCon 2013 taking place February 25-28, 2013 in San Jose, Calif.  Sponsored by Accellera, DVCon is the premier conference and exhibition for functional design and verification, focused on bringing information from the leading edge of technology, techniques, standards and methods.

Accellera currently has 13 technical committees dedicated to create, support, promote and advance system-level design, modeling and verification standards. Committees are composed of a broad spectrum of chip designers, engineers, educators, scientists, tool providers and technologists with many years of practical experience in IC design and tool development.  Working together, these committees produce the leading-edge EDA and IP standards that lower the cost to design commercial electronics and increase efficiency of designers worldwide.

Technical Activities

- Analog/Mixed-Signal extensions to Verilog (Verilog-AMS)
- Analog/Mixed-Signal extensions to SystemC (SystemC-AMS)
- Configuration, Control and Inspection (CCI) standards for SystemC
- IP Tagging for data-driven tracking of soft IP
- IP-XACT metadata standard for IP integration
- Open Verification Library (OVL) assertion library
- Standard for Co-Emulation Modeling Interface (SCE-MI)
- Synthesizable subset of SystemC
- SystemC language standard
- SystemC Verification (SCV) library
- SystemRDL
- Transaction-Level Modeling (TLM)
- Unified Coverage Interoperability Standard (UCIS)
- Universal Verification Methodology (UVM) standard

About Accellera Systems Initiative

Accellera Systems Initiative (Accellera) is an independent, not-for profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies.  The organization accelerates the development of standards that increase designer productivity and lower the cost of product development. As part of its ongoing partnership with the IEEE, standards developed by Accellera are contributed to the IEEE Standards Association for formal standardization and ongoing governance. For more information, visit www.accellera.org. For membership information, Email Contact.


Contact:

Jill Jacobs
Public Relations
Accellera Systems Initiative
Phone: +408 505 6017
Email Contact