All Categories : Technical Papers : White Papers Bookmark and Share

Title : WP298 - Power Consumption at 40 and 45 nm
Company : Xilinx, Inc
Date : 25-Sep-2011
Rating :
Downloads : 4

Rate This File
5 Stars
4 Stars
3 Stars
2 Stars
1 Star

At 40 and 45 nm process nodes, power has become the primary factor for FPGA selection. This white paper details how Xilinx designed for this new reality in its recently introduced Spartan®-6 (45 nm) and Virtex®-6 (40 nm) FPGA families, achieving dramatic power reductions over previous generation Spartan-3A and Virtex-5 devices.
User Reviews More Reviews Review This File
Featured Video
Jobs
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise