Reliability is a major criterion for integrated circuits (ICs) in safety critical applications, such as automotive, medical, or aviation electronics. A particular effect that contributes to wear-out is device (i.e. transistor) degradation. Its impact on the circuit behavior can be verified by circuit level aging simulations, which are offered by various EDA vendors. However, reasonable results can
only be achieved with accurate and efficient device (i.e. transistor) degradation models. This white paper discusses the state of the art and points out
opportunities for improvements.
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