Faults and Fault Detection
Last Edit July 22, 2001
Introduction
In any circuit composed of logic gates there is the possibility of the
occurrence of a fault. A fault is defined to have occurred when any circuit
output variable assumes a value of 1, 0 or X that differs from the value
expected. When this occurs, the circuit violates the original circuit
equations.
Fault detection requires that a vector test set provide a test to detect
when any fault has occurred in a circuit path. Fault location requires
that sufficient tests be included such that the specific node in failure
can be located. In general, fault location requires a larger vector set.
Controllability
A circuit is judged on the ease and ability of the input variables to
set internal and output variables to specific values. This is defined
as circuit controllability. The ideal case is when internal variables
can be set with one input vector (input variable configuration). The worst
cases require that multiple vectors be gated through the circuit until
a target internal node is set or forced to a desired value.
Observability
A circuit is judged on the ease and ability to propagate the values on
input and internal variables to a primary and therefore observable output.
This is defined as circuit observability. The best case is when an internal
variable propagates directly to an observable output within the vector
time step. The worst cases require that multiple vectors be gated through
the circuit until a target internal node has propagated to an observable
output. In extreme cases, a fault may be undetectable.
Masking a Fault
The presence of an internal or input fault may not be observable at any
circuit output. In this case the fault is considered to be masked. A single
fault may be masked as the result of the causes shown in Table 9-1.
Masked faults are undetectable by definition since the observed circuit
behavior is correct.
The occurrence of a second fault may uncover a previously undetectable
fault. To be complete, a vector test set must include tests for this case.
Table 9-1 Single Fault Masking
- reconvergent fan-out where unequal parity changes have occurred
- circuit redundancy, deliberate or otherwise
- previous occurrence of an undetectable fault
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