Non the less, one almost expects that an EDA company would have its headquarters in Silicon Valley.
But this is not always true. I have found two interesting and growing companies located outside the valley that offer significant products: Tanner EDA and Zocalo Tech.
Tanner EDA
Tanner EDA (www.tanner.com) is the part of Tanner Research that develops and markets EDA tools. Tanner Research is located in Monrovia, CA. Monrovia is a town not far from Pasadena, where you can find Caltech and JPL, and attend the world famous Tournament of Roses. In other words, a hub of technological activity focused on system level design and development. Also one of the leading centers of research not just in the US but in the world. Tanner Research connection with Caltech is embodied in its Chief Scientist, Dr. Massimo Civilotti. Dr. Civilotti earned his Ph.D from Caltech , where his advisor was Dr. Carver Mead.
When Tanner Research was founded in 1988, its offices were in Pasadena. It moved to Monrovia is 2006. Monrovia implemented a 30 years redevelopment plan completed in 2003 that transformed it from a poor community with ramshackle homes into an attractive community that offers some of the best quality of living to be found at the foot of the San Gabriel mountains, in the shadows of Mt. Wilson Observatory.
Tanner Research, Inc.is a leader in various facets of microelectronic design. To streamline the design process, Tanner Research also provides training and consulting services for its customers. The areas of consulting expertise include integrated circuit and micro-electro-mechanical systems (MEMS) design. The advanced research and development arm of Tanner Research is focused on applications that promise to deliver unprecedented capabilities, including image processing, speech recognition, laser interferometry, and optical communication.
Tanner Research has been enjoying consistent growth since it was founded. The company has been named to the Deloitte & Touche's Fast 50 Award for five years in a row. The company has also been named by L.A. Business Journal as one of the 100 Fastest Growing Private Companies in Los Angeles County for three years in a row.
On April 27th Greg Lebsack, President of Tanner EDA, presented the company to a collection of international editors during the Globalpress event in Santa Cruz. The company has so far served over 33,000 customers in 67 countries offering a full suite of tools for Analog/Mixed Signal design. During his presentation Mr. Lebsack introduced the analog market segment by stating that "The digital revolution has changed the way we communicate, work, and travel. However, the promise of digital technology is only as good as the ability of the analog technologies that faithfully reproduce digital language of 1's and 0's into analog signals that can be hard, seen, felt, and perceived by humans".
EDA industry sales supporting analog, mixed/signal, and RF designs where approximately $1 billion in 2009. The majority of designs in the segment where implemented at 90nm or larger geometries. These designs require complex architectural decisions, and deep understanding of semiconductor physics. But, in comparison with digital implementations, these designs lack automation and are often considered an art form. Tanner EDA has a diverse foundry portfolio that supports fabless system companies, as well as companies that also have their own internal fabrication facilities. In the first category they support: TSMC, UMC, TowerJazz, Xfab, Dongbu, and AMS. The latter category includes TI, Analog Devices, Maxim, and Fairchild.
Tanner EDA is targeting the layout of analog circuitry as its primary area. Analog layout is expensive, non-scalable, and non-repeatable. It requires robust tools that will also support business productivity and cycle time requirements. The company has labeled its efforts in this market as "Analog Acceleration". The approach includes:
- Recognition and generation of common structures such as Differential Pairs, Current Mirrors, Resistor Dividers,
- Correct by construction,
- Consistently high quality layout that is closely aligned with handcrafted layout,
- Is "silicon aware" because it understands functionality and process artifacts, and
- Allows designers to easily tune the design by providing a rapid generation and simulation loop for optimal solution.
To achieve the goal Tanner EDA offers integrated, cohesive tools that have a common user interface. The goal is to reduce design kick-off time to hours instead of weeks. As a smaller vendor the company must make sure that their tools can be quickly and flexibly integrated in the design flow and that they support industry standard data file formats.
Cost is an important component of productivity. The products must offer the best price/performance, require minimal support, and require minimal ramp up time. John Zuk, Vice President of Marketing and Strategy, is confident that his company has reached these goals and is delivering analog design innovation to its customers.
Zocalo Tech
Zocalo Tech (www.zocalo-tech.com) is located in Austin Texas. The capital of Texas, located on rolling hills in the southeastern portion of the state, has a charm of its own and calls itself "The Music Capital of the World". It has grown considerably since the time in the early 1980's when I used to travel there for work, developing the second source agreement for the 68000 CPU between Philips and Motorola. Yet, it has kept its charm as a refuge for artists and creative people of all kinds. Austin has a long tradition in the semiconductors field. So much so, in fact, to earn the nickname "Silicon Hills". I am still not sure that claiming to be built of sand, whether it is a valley, a forest, or hills, is really something to be proud of. Clearly I need to start a semiconductor company where I live, on the Gulf of Mexico, so that this county can be called "Silicon Beach".
Zocalo Tech is a young small technology company, incorporated in 2006. As with many startups based on technological expertise, the company developed a couple of products before finding the right market segment. Often the technology is ahead of the market demand, and just because a product is robust does not mean that there is sufficient demand for it.
Zocalo initial development was directed to technology assuring that test bench, design and verification plan stayed in sync. Zocalo developed its own SystemVerilog elaborator and parser allowing incremental update for any design modifications. Additionally, technology was developed to keep the verification implementation in sync with the test plan, by producing them from a single source. As with many start-ups, other opportunities to use the technology became apparent. Assertion Based Verification was a growing market that could use automation.
Properties are facts about a design that must always or never be true. Assertions are software monitors placed in the design to assure the properties are adhered to during simulation. Through usage, the terms assertion and property are often used interchangeably. The prevalent language today for writing assertions is SystemVerilog Assertion Language. Assertions written in this language are referred to as SVAs.
Howard Martin, the company President, told me that "at that time there was lots of buzz about Open Verification Library (OVL) and the big three each had their own assertion libraries. However, all of the libraries were time consuming and error prone to use manually. Our first product, Zazz OVL, was introduced at DVcon 2009 and released in June 2009. In addition to providing automation for quick and easy use of assertion libraries, Zazz OVL provided automatic bind files and documentation. Both required for enabling Assertion Based Verification."
As it turned out this product had minimum market pull. There was minor if any use of Assertion Based Verification(ABV). The method requires the use of assertions as part of the verification methodology and market surveys indicate that less than 40% of the projects used assertion. Designers use ABVon an ad-hoc basis dependent on their skill and desire to use them. In the world of ad-hoc use, bind files and documentation are not required. Although assertion libraries can be classified as simple assertions, designers think they are inflexible. The use of SVA is much more prevalent than using a more structured ABV method.
A few of the large companies have a level of ABV where designers are required to use pragmas or comments in their designs. These are then post processed to automatically add simple one or two cycle assertions….and in some cases bind files.
To its credit Zocalo embarked on a significant market analysis to determine the major reasons why ABV is not in wide spread use. They found that:
- Time and cost to determine where assertions are required.
- New designs…where do I start and how many is enough?
- Legacy code and IP...rigid assessment is measured in terms of days or weeks.
- Lack of information for management to determine cost of adding assertions.
- Lack of metrics for management to determine:
- Progress in adding assertions.
- Quality of assertions.
- Effectiveness of assertions use.
- Assertion use is limited to simple assertions versus more powerful and useful assertion because:
- Complexity of language for coding assertions.
- Time and effort to debug a complex assertion.
Mr. Martin tells me that " Formal users have no choice relative to providing complex temporal properties. We provide the ability to write this level of property easily, thereby eliminating one of the issues that has kept formal from wide spread use. However, formal has other challenges such as capacity problems and the general idiosyncrasies of each formal technology tool. Properties must therefore be optimized to address these issues as well."
The present Zazz architecture consists of four functional components that implement the following capabilities.
- Zazz Bird Dog - Analyzes the design and rank orders the most important candidate signals that assertions should be considered for. Signals that already have legacy properties are recognized and automatically them as assertion candidates.
- Zazz Metrics - Provides the project team with an on-going progress report about the quantity and quality of the assertions added versus those targeted for adding assertions to. Historical reports on completed functional blocks provide a baseline for measuring the value of using assertions to reduce debug time. If legacy properties are part of the design code, they are automatically included as part of the metrics.
- Zazz Visual SVA - Provides the ability to create and debug all levels of assertion complexity without learning the SVA language. Visual SVA completely eliminates the long learning time typically associated with becoming proficient with and retaining the skills required to write properties with the SVA language. Visual SVA also provides dynamic control of assertions and automatic bind file management and documentation.
- Zazz Assertion Library Support - Makes using assertion libraries fast and easy while providing automatic bind file management and documentation. In addition to supporting OVL and libraries from the major EDA vendors, user defined assertion libraries can be added to Zazz.
Visual SVA insures that creating assertions at all levels of complexity (simple 1 or 2 cycle, complex temporal multi threaded or end to end properties) is an easy to learn intuitive process. Visual SVA frees the user to focus on describing the intent of the design rather than the complexities of the SVA language. Visual SVA's GUI consists of a canvas representing time scale from left to right and threads from top to bottom. Widgets, representing the operations associated with creating a property, are dragged and dropped on the canvas and automatically connected. A typical approach to building an assertion is to start with a simple assertion and add complexity based on interacting with the design hierarchy and recognizing additional scenarios that can take place that need to be checked as part of the property. As complexity of the assertion is increased, at any time by user command, an assertion testbench is automatically created, executed and presented for viewing via the user's wave form viewer. The resulting wave forms allow the user to almost immediately examine the output for the intended results.
For a company offering a point tool, it is important that it be easily incorporated in the design flow existing at its potential customers. The Zazz Assertion Library supports Accellera's Open Verification Library (OVL), Cadence's IAL, Mentor's QVL and Synopsys' SVA _CG. Multiple libraries may be used together. Additionally support for custom assertion libraries is available. Zocalo also supports both OVM (Cadence and Mentor) and VMM (Synopsys) verification methodologies. Accellera has for the last year and a half been working on uniting these two methods into a single one called the Universal Verification Methodology (UVM). Zocalo fully intends to support it. Without any level of automation, manual use of assertion libraries to describe a property can take significant time. The probability of an error is high adding additional time to the process.
When asked about future plans for his company, Mr. Martin said: "Today we are focusing on simulation based ABV. However, in the future we see this market as a potential opportunity to partner with a formal provider with the objective to address property optimization." This observation is a mature realization of the difficulties faced by small EDA companies to reach a significant market presence even when growing at a double digits rate year after year.
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-- Gabe Moretti, EDACafe.com Contributing Editor.