Welcome to DAC 2011Our theme at DAC 2011 is Delivering Innovation through True Collaboration |
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Production-ready 28nm: Fully Design-enabled at Multiple Fab LocationsLow Power High-K/Metal Gate 28nm CMOS Solutions for High Performance Applications |
Low Power High-K/Metal Gate 28nm CMOS Solutions for High Performance Applications High-K/Metal Gate (HKMG) is one of the most significant innovations in CMOS fabrication since the development of silicon VLSI. The 28nm technology is designed for the next generation of mobile smart devices demanding faster GHz processing speeds, lower standby power and longer battery life. To meet these demands, the 32/28nm HKMG solution is a "Gate-First" approach that shares the process flow, design flexibility, design elements and benefits of all previous nodes based upon poly SiON gates. This solution is far superior to present alternatives in scalability (performance, power, die size, design compatibility), cost (a typical foundry customer will save tens of millions of dollars over the course of a 28nm vs. 40nm product portfolio lifecycle) and manufacturability. Read more ... |
Technology's Roadmap to 22/20nmWith unrelenting pressure to do more with less yet make it faster and cheaper, 22/20nm provides the scaling from 28nm to meet market needs |
Balancing cost, risk, performance and power demands, GLOBALFOUNDRIES is well on its way to delivering 22/20nm technology to customers for product introduction in 2013. GLOBALFOUNDRIES has collaborated with development partners and leading customers around the world to establish the technology specifications to meet a wide range of design requirements across the computing, consumer and communications segments. GLOBALFOUNDRIES focus for the 22/20nm generation is to maintain the same increases in performance, power efficiency and density as when scaling from 45/40nm, and 32/28nm. Planar CMOS allows us to achieve today's and tomorrow's requirements by continually implementing innovative improvements in materials integration, lithography and interconnect technology. Read more ... |
A Birds-Eye Overview of DRC+ |
DRC (Design Rule Constraints) are the fundamental principles in constraining VLSI (Very Large Scale Integration) circuit designs to standardized physical and electrical manufacturability criterion. Today's component miniaturization and density technologies require continual reassessment of best practice applications to keep design geometries aligned with realistic manufacturing capabilities. Two-dimensional DRC layout patterns may prove to be mathematically and layout rules compliant. But, when they are applied at the extremes of the manufacturing process tolerances, lithographic printability issues still arise. DRC+ is a new methodology that can be implemented in identifying the issues around complex process methods. Read more ... |