“With such a large base of existing IXP28XX customers, the Netronome NFP is well positioned to intercept the convergence of the network and data center,” said Bob Wheeler, senior analyst at The Linley Group. “A programmable dataplane, with hardware-based I/O virtualization and integrated security goes beyond what L2-L3 NPUs, security processors and embedded communication processors individually offer to meet the requirements of next-generation switches, routers, wireless infrastructure, appliances and servers.”
“The NFP provides existing IXP28XX customers with a path forward for the evolution of their high-performance product designs,” said Rose Schooler, general manager, Performance Products Division, Intel's Embedded Computing Group.
High Performance Networking with Power Efficiency
For designers of communications equipment whose network processing requirements extend beyond simple forwarding, the NFP-32xx provides intelligent packet processing in a power-efficient design.
- High-Performance: Powered by 40 multi-threaded programmable networking cores running at 1.4GHz, the NFP delivers over 56 billion instructions per second with 320 hardware threads that optimize memory utilization - allowing for 1800 instructions per packet at 30 million packets per second. This enables 20Gbps of L2-L7 deep packet processing with line-rate security and I/O virtualization for millions of simultaneous flows.
- Power Efficiency: Operating at only 15 to 35 watts, the NFP-32xx revolutionizes green computing by delivering more than four times the power efficiency of its closest competitor.
“The NFP’s massively parallel microengine architecture has unique advantages over traditional technologies,” said Peder Jungck, founder and CTO at CloudShield Technologies. “This allows us to achieve a new level of scalability for our content and network processing platform.”
Software-Defined I/O: Programmable Processing for Ultimate Flexibility
Unlike fixed-function ASICs and configurable NPUs, Netronome’s NFPs are the first fully programmable processors capable of addressing the increasingly complex requirements of unified computing architectures. Software-defined I/O supports both L2-L3 packet processing and L4-L7 application- and content-aware deep packet inspection. This programmability, coupled with line rate packet processing, provides the highest level of inspection and throughput available in the industry for traditional NPU applications such as high-performance line cards.
“Anagran’s products eliminate network congestion by constantly maintaining flow state for a large number of dynamic applications and protocols,” said John Harper, vice president of engineering at Anagran. “The NFP delivers the performance and programmability required to allow us to meet our customers’ requirements, while avoiding the costly, lengthy and risky process of a custom ASIC development.”
This unique combination of programmability and performance also enables a new approach for unified computing adapter cards by replacing dedicated hardware for FCoE HBAs, iSCSI, TOE and other functions with flexible implementations in firmware. In addition, virtual switches, load balancers and firewalls required in unified computing platforms can be implemented allowing virtualized server vendors to rapidly adapt to the changing standards in the convergence of networking and computing.
Network Virtualization in Silicon
Virtualized multicore CPUs are increasingly used in switches, routers, and network appliances for control, data plane, security and other networking applications. To scale network performance to 10Gbps and beyond the NFP-32xx offers a PCIe v2.0 implementation including extended SR-IOV with 256 queues to provide guaranteed bandwidth and low latency access to shared I/O devices. Netronome’s SR-IOV drivers include configurable algorithms for load balancing to virtualized multicore CPUs and efficient zero-copy mechanisms that significantly improve CPU, memory and system bandwidth utilization. In addition to eight PCIe lanes, the NFP supports a wide range of popular high-speed network interfaces including dual 25Gbps Interlaken, SPI-4.2 and dual 10Gbps XAUI.
“The NFP offers an exciting new model for optimizing I/O in virtualized server systems by combining the flexibility of an entirely software-based architecture with the performance and scalability of dedicated and programmable networking engines to deliver a powerful I/O fabric on every server,” said Simon Crosby, CTO of the Virtualization and Management Division at Citrix Systems. “With the rapid increase in the number of VMs per server enabled by Moore's Law, XenServer can take advantage of the NFP to deliver greater I/O performance with per-VM QoS guarantees while enforcing multi-tenancy, per-VM ACL policies and security functions.”
Integrated Hardware Acceleration for Security, Content and Parallel Processing
Unified computing architectures place extensive security requirements on the network. Ranging from coarse policy enforcement using IEEE 802.1AE LinkSec to granular and stateful flow-based applications such as IPsec and SSL, security processing is now required for the majority of network traffic. The NFP provides 20Gbps of line rate security processing by embedding hardware acceleration in a programmable dataplane, including:
- Cryptography engines with support for RC4, 3DES, AES, SHA-1, and the SHA-2 family of algorithms
- PKI engines to accelerate modular exponentiation with up to 2048-bit keys
- 3.5 billion 64-bit hashes per second for security, regular expression and deduplication applications
- Dedicated hardware for true random number generation
- Support for in-line and look-aside security processing designs
These features increase network performance, decrease latency and free CPU cycles for added application processing. Further, their integration removes the need for specialized security processors, decreasing system cost, complexity and power consumption.
In addition to accelerators for security and content processing, the NFP-32xx offers integrated hardware features that make it ideally suited for parallel programming, including CAM instructions for determining inter-thread dependencies, 44Gbps of next-neighbor interconnects for high performance pipelines, 3Tbps of switched internal data bus bandwidth, ECC on all memory busses, local timers and CRC engines, atomic memory engines and a queue manager for traffic management.
Expansive Ecosystem and Proven Tools
Netronome’s NFPs are supported by a large ecosystem including leading operating system vendors, complementary silicon, protocol software stacks, system design services and other tools vendors. Additionally, they are available with a comprehensive set of development tools offering unmatched ease of use to support the customer’s design process. Derived from the Intel Developer Workbench (IXA SDK 4.3), the Netronome Programmer Studio™ is backward-compatible with customer software from existing designs, protecting their significant investment. The Programmer Studio provides existing IXP users a familiar environment, while new users of the NFP benefit from the robustness of a tool that has been tested and proven through several generations of product development. The Programmer Studio reduces development time with a C compiler for high-level programming, a cycle‐ and data‐accurate simulator, as well as packet and traffic generation tools. The Netronome tool suite also includes sample and production-ready software, a customer reference platform for silicon evaluation, and PCIe cards to support software development.
"We are impressed with the NFP and are excited about the new capabilities and performance offered," said Dave Arnold, vice president of engineering at Stoke. "These new capabilities, coupled with backward compatibility to our existing IXP designs, offer a safe migration path and contribute to Stoke's continued industry leading performance."
“Netronome is pleased to announce the NFP as a testament to the shared vision we have with our customers that every packet will be intelligently and securely processed,” said Niel Viljoen, founder and CEO of Netronome. “Customers migrating from existing IXP28XX designs, and those building new heterogeneous designs based on the NFP coupled with multicore CPUs are now able to realize that vision.”
Pricing and Availability
The NFP is available in a range of price and performance options spanning from 16 to 40 cores operating at 1.0 or 1.4GHz with optional cryptography support. With prices starting at $275, the NFP-32xx family of network flow processors are available for sample orders today, with general availability in Q3 2009.
About Netronome Systems
Netronome is a leading developer of highly programmable semiconductor products that are used for intelligent flow processing in network and communications devices. Netronome’s solutions include network flow processors and acceleration cards that scale to more than 20Gbps. They are used in carrier-grade and enterprise-class communications products that require deep packet inspection, flow analysis, content processing, virtualization and security. Netronome is headquartered in Pittsburgh, PA, with core operations in San Jose, CA and Boxborough, MA, and international locations in the United Kingdom, China and South Africa. To learn more about Netronome and its products, please visit www.netronome.com.
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