This benchmark demonstrates the Tile architecture's versatility in providing high performance in signal processing applications in addition to its already proven performance in general compute applications. Coupled with the Tilera tools suite, the performance provided by the architecture is easily achievable for a variety of signal processing markets such as multimedia and wireless infrastructure equipment.
The BDTI benchmark was implemented in C/C++ with a limited number of intrinsics and without any assembly code. The Tilera iMesh™ network and homogenous cores enabled developers to optimize the benchmark on one core and then replicate the exact code onto the others; as a result, the performance scaled linearly as more cores were added. The Tile processors give customers the flexibility they need by allowing them to implement their own algorithms or use standard off-the-shelf software while still obtaining high performance.
"Achieving these breakthrough BDTI benchmark results in just weeks demonstrates Tilera's ability to provide high performance without sacrificing ease of use or time to market," said Rao Gattupalli, vice president of Applications, Tilera Corporation. "Tilera's easy-to-use programming enables customers to leverage their existing software investment and continue to differentiate themselves in their markets."
The TILE64 processor on the BDTI benchmark surpassed all previously benchmarked processors, providing up to 10X the performance of typical high-end DSPs. Customers using the TILE64 can implement a complete wireless platform integrating signal processing and general compute functions all in one device. This provides customers with significant benefits:
-- the ability to replace a disparate set of tools and programming models
with industry-standard tools and standard C/C++ programming;
-- the simplification of platform designs, reducing risk and time-to-
market;
-- and an increase in platform compute density, adding more performance
per square inch to accommodate growth.
The complete benchmark results can be viewed at http://www.bdti.com/bdtimark/ofdm.htm. More information on Tilera and the TILE64 processor can be found at www.tilera.com.
About Tilera
Tilera Corporation is the industry leader in highly-scalable general purpose multicore TILE™ processor family for the embedded market. Tilera's processors are based on a new mesh iMesh™ architecture that scales to hundreds of RISC-based cores on a single chip. The distributed nature of Tilera's revolutionary architecture and the standards-based tools, such as C/C++ compiler, GNU tools and Eclipse IDE, provide an unprecedented combination of performance, power efficiency and programming flexibility. Tilera was founded in October 2004 and launched its first product, the 64-core TILE64™ processor, in August 2007. The company is headquartered in San Jose, Calif. with locations in Westborough, Mass., Beijing and Bangalore, India.
The BDTI Communications Benchmark (OFDM)™ is a benchmark based on a simplified orthogonal frequency division multiplexing (OFDM) receiver. It is representative of the signal processing workloads found in communications equipment for applications such as DSL, cable modems, and wireless systems. It is designed to enable benchmarking and comparison of a wide range of devices, including processors, FPGAs, and other processing devices, on real-world applications.
For more information, please contact: Tara Sims siliconPR for Tilera 415.385.4455 Email Contact www.siliconpr.com