What
Sidense at the Design Automation Conference (DAC)

Breakfast Roundtable at the Hilton
Can IP Integration be an SoC Methodology or is it Always Ad-Hoc?
Moderated by Ron Wilson, Executive Editor of EDN
Wednesday, 8:00-9:30AM at the Hilton Hotel, Carmel Room, 4th Floor

IP Talks! at the ChipEstimate.com Booth #2358
Sidense to discuss the rapidly growing embedded OTP (One-Time Programmable)
market and the Company's SiPROM and new SLP memory IP products
  --  Monday at 10:30AM
  --  Tuesday at 1:30PM
  --  Wednesday at 11:00AM

Kiosk at the UMC Booth #2306
Sidense available for a slide presentation on the company and its products
  --  Wednesday 1:30PM-6PM
  --  Thursday 9:00AM-Noon

Where
Design Automation Conference (DAC)
Anaheim, California

When
Meetings - Monday through Thursday, June 9-12, 2008
Breakfast Roundtable - Wednesday, June 11 at 8AM
IP talks! at the ChipEstimate.com booth - Monday through
 Wednesday, June 9-11
UMC booth - Wednesday and Thursday, June 11-12

Who
Xerxes Wania, Sidense President and CEO
Jim Lipman, Sidense Marketing Director

About Sidense

Sidense, listed on EE Times 60 Emerging Startups list for 2008, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.

Sidense SiPROM and SLP OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com

For more information or to schedule a meeting with Sidense please contact:

Jim Lipman
Sidense

Email Contact
925-606-1370