Mountain View, Calif. - April 24, 2007 - Apache Design Solutions, the technology leader in full-chip dynamic power signoff and silicon integrity platform solutions for system-on-chip (SoC) designs, today announced that the company has achieved its 17th consecutive quarter of record bookings and revenue, while maintaining profitability. Over 30% of Apache's Q1 bookings came from new products including PsiWinder for full-chip clock jitter analysis and other unannounced products, while RedHawk adoption continues to grow as the power signoff solution of choice by leading semiconductor companies.

“Q1 is a seasonally weak quarter for EDA business. But Apache has achieved another record quarter with significant bookings,” stated Craig Shirley, vice president of worldwide sales at Apache. “This achievement validates the strength of our world-class R&D and support team to deliver the only complete silicon integrity platform solution for SoC, analog-IPs, and Systems.”

“Over the past year, many leading semiconductor companies have mandated power as a signoff requirement for designs at 90nm and below. This mandate was driven by the increasing chip failures identified as power- and noise-related issues, even after passing traditional timing signoff.” stated Andrew Yang, CEO of Apache. “Apache will continue to expand our silicon integrity platform solutions by working closely with our leading customers and foundry partners, and ensuring timely delivery of new products in 2007.”

About RedHawk
RedHawk is a full-chip Vectorless Dynamic™ physical power integrity solution for SoC power closure sign-off of 130nm, 90nm, and 65nm designs. Correlated with silicon measurements and SPICE, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as effects of on-chip inductance, package RLC, and decoupling capacitance. RedHawk delivers transistor-level accuracy with cell-based capacity, performance, and ease-of-use. With RedHawk, designers can identify dynamic “hot spots,” examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise. RedHawk enables designers to reach power closure sign-off for high performance SoCs, including those utilizing advanced low-power design techniques such as leakage current control, MTCMOS (power-gating), multiple voltage domains, and multiple threshold transistors.

About PsiWinder
PsiWinder is a clock jitter analysis and critical path timing sign-off solution that considers the concurrent and interdependent effects of signal integrity (crosstalk noise) and power integrity (dynamic voltage drop and ground bounce) on clock network and critical path timing. PsiWinder delivers Spice-level accuracy within a cell-based flow, enabling designers to gain much more realistic view of clock jittering and skew, as well as the setup and hold time violations in the critical paths.

About Sahara-PTE
Sahara is the industry's first fully integrated power-thermal-electrical analysis solution for SoC designs. Its layout-driven platform includes built-in power/thermal/noise library, incremental RLC extraction for power, noise, and temperature, and tightly coupled high-capacity, high-performance power-thermal-electrical analysis engine, all within a single analysis, diagnosis, and debugging environment. With Sahara-PTE, designers can analyze the impact of temperature and temperature variation on leakage, timing, voltage-drop, and reliability.

About Apache Design Solutions
Apache delivers the leading power sign-off solution adopted by 70% of the top semiconductor companies and a complete platform solution for silicon integrity of low-power, high-performance system-on-a-chip (SoC) designs. Apache's innovative platform considers all sources of noise that impacts the design--such as power, signal, package / system IO, substrate, and temperature--Apache's silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache's vendor-neutral solution enables designers to adopt any industry-standard physical design flow and is certified by TSMC's 5.0, 6.0, and 7.0 Reference Flow (NYSE: TSM). Apache has direct sales and support offices worldwide with over 40 customers, including 8 of the top 10 semiconductor companies. For more information, visit www.apache-da.com.



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