Athena Design Accelerates Path to Design Closure for Complex ICs With Next-Generation Optimization System
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Athena Design Accelerates Path to Design Closure for Complex ICs With Next-Generation Optimization System

EDA Start-up Creates New Anchor Point In IC Implementation Flow to Manage Timing, Signal Integrity, and Other Nanometer-Level Effects

SANTA CLARA, Calif.—(BUSINESS WIRE)—March 13, 2006— Athena Design Systems, Inc., a new EDA start-up focused on critical implementation issues in physical IC design, today unveiled its strategy for delivering a new class of IC optimization tools to address the costly, acutely painful process of achieving design closure for nanometer-scale chips. Technology development has been underway at Athena Design for two years in collaboration with NEC Electronics GmbH, as well as other industry-leading electronic design automation (EDA), integrated device manufacturer, and fabless semiconductor companies. The company plans to introduce commercial availability of its first products in the second quarter of 2006.

Founded in 2003, Athena Design is led by EDA veterans John Murphy and Dimitris Fotakis, both of whom have extensive experience in physical IC design. Murphy, the company's CEO, joined Athena Design following his 12-year career at Cadence Design Systems, Inc. Fotakis, Athena Design president and founder, previously co-founded AmmoCore Technology, after holding R&D and engineering positions at Cadence, High-Level Design Systems and National Semiconductor. He also serves as Athena Design's chief technology officer and leader of its multi-disciplined development team that brings together expertise in extraction, layout, timing analysis, signal integrity, optimization and multi-processing applications.

Athena Design is funded by Woodside Fund, Asset Management and Draper Richards, with representatives from each firm on its board of directors. The most recent addition to the Athena board is semiconductor industry visionary and venture capitalist Jim Hogan (reference accompanying announcement).

"The complexity of manufacturing processes at 90 nanometer (nm) and below requires a change in the way chips are implemented in order to hit market windows with lower costs and higher yields," said John Murphy, CEO of Athena Design. "Adding engineering resources dramatically increases costs, so we provide companies with technology that produces higher quality of results at extreme speed. They can reach design closure faster and with more confidence by accelerating the productivity of the people, tools and compute resources they already have in place."

Design Closure Crisis

Industry experts estimate that with each new semiconductor manufacturing process node, the time spent on back-end IC design doubles while development costs triple. This is primarily due to the fact that today's IC implementation flows require serial execution of analysis and extraction tools in batch mode to locate timing, signal integrity, power, and manufacturability problems. The net result is many time-consuming 'analyze-correct' loops and manual intervention by engineers to arbitrate fixes across conflicting design constraints. This process is especially taxing on computing resources due to the volumes of data required for large, complex designs.

Athena Design Strategy

Athena Design expects to change the way designs are implemented with the IC industry's first "concurrent analysis and optimization" system for managing deep sub-micron effects. The company's approach collapses multiple routing loops into an automated optimization executed across a distributed multi-processing platform. The system provides a central point of control to rapidly explore designs, optimize physical layout, and evaluate the consequences of changes. This improves the quality of results and reduces the risk of problems later in the final design sign-off process.

Athena Design is working closely with technical and business advisors from the industry, including Matthias Voigt, General Manager, NEC Electronics GmbH, "Physical IC design continuously requires breakthrough EDA technologies, because this is where the rubber meets the road. The effects brought on by 90nm geometries and below are just too severe and too numerous to be handled with only traditional tools and processing platforms. Athena Design has the focus, the strategy and the team to contribute to solutions with truly disruptive technologies."

Next-Generation System

The Athena Design system is based on the EDA company's design intelligent optimization algorithms, embedded analysis and extraction engines, and patented multi-processing and tiling technologies. The underlying system architecture also includes a design management infrastructure that transparently manages all optimization tasks. It is both compatible and complementary to IC design flows and routers from major EDA vendors so that Athena Design users can also maximize their existing EDA investments.

"Analysis and design change management are significant bottlenecks in chip development, mainly because implementation flows have been constrained by serial engineering and processing techniques," said Athena Design president and founder Fotakis. "As a result, too much time is spent on manual optimization of the physical chip design. This can be automated and better managed through distributed processing, which is exactly what we are enabling engineers to do at the critical routing stage."

About Athena Design

Headquartered in Santa Clara, California, Athena Design Systems, Inc. develops and markets design optimization tools that address the physical implementation challenges of complex nanometer chip design. The company's products accelerate the productivity of engineers, design tools and computing resources enabling chip companies to reach design closure faster with higher quality of results and lower development costs. For more information about Athena Design, visit http://www.athenadesign.com.



Contact:
For Athena Design Systems, Inc., Santa Clara
Wired Island, Ltd.
Laurie Stanley, 925-224-8762

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