Mentor Graphics and STARC Partner to Develop Improved At-speed Test Methods for Nanometer Design
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Mentor Graphics and STARC Partner to Develop Improved At-speed Test Methods for Nanometer Design

WILSONVILLE, Ore.—(BUSINESS WIRE)—Jan. 24, 2006— Mentor Graphics Corporation (Nasdaq: MENT) today announced a joint development agreement with STARC (Semiconductor Technology Academic Research Center), a research and development consortium co-founded by eleven major Japanese semiconductor companies. The joint development will focus on new at-speed delay test methodologies for IC designs that will increase outgoing chip quality levels by improving the detection of small delay defects during manufacturing test.

As nanometer technology moves to the 90nm and 65nm nodes, minor parametric variations give rise to an increase in delay-related defects in the manufacturing process. Many of these defects are subtle deviations leading to small delay variations that are difficult to detect using standard delay test techniques. To maintain high quality levels for tested devices, many advancements in at-speed test pattern generation technology have emerged. The development partnership between Mentor and STARC seeks to fulfill proposed delay defect detection requirements from STARC and its client companies by incorporating new technologies into Mentor's Automatic Test Pattern Generation (ATPG) IC test tools that will ensure the highest quality for tested chips.

"STARC's mission is to seek out new and effective technologies through joint research between universities and the industry, in order to achieve breakthroughs in semiconductor technologies," said Yasuo Sato, senior manager, Test Methodology Group at STARC. "As our member companies move to 90 and 65 nanometer technologies, improving manufacturing test is a critical requirement. We believe that this partnership with Mentor will satisfy that requirement and will result in a breakthrough at-speed test methodology."

"The proposals from the STARC consortium for improving small delay defect detection coincides with Mentor's development efforts in the area of at-speed test pattern generation," said Robert Hum, vice president and general manager for the Design Verification and Test Division at Mentor Graphics. "We are extremely pleased to be working closely with STARC, and look forward to continuing this development partnership to provide real solutions for STARC and our customers."

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $700 million and employs approximately 3,950 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

Mentor Graphics is a registered trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.



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