Unique LVS, ECO, and association features help expand tool scope

San Jose, Calif., March 18, 2005 Silicon Canvas, Inc. (SCI) today announced the addition of new features and a methodology which will facilitate analog designs with Retargeting and Migration capabilities. Additional features to the newly released Laker 3.1, are an LVS-like engine to extract devices and wire connections from GDS stream data; an association engine to establish connectivity information from a SPICE netlist and annotate it back into GDS file; a front to back ECO comparison engine to detect the front-end spice netlist discrepancies, or changes, associated with the back-end layout. Using these unique features, a complete Analog IP reuse flow in Laker is presented in Figure 1.

Transistors, in Analog IP, typically run in the narrow linear region (as opposed to the wide saturation region). This makes it very difficult to perform straight percentage grows or shrinks to translate designs to different technologies. As such, analog IP reuse inevitably involves detailed understanding and re-simulation to adjust device sizes. Laker's association engine of establishing the connectivity information into GDS can be an indispensable vehicle toward understanding IP layout. On the other hand, analog design typically do not use complicated hierarchical architectures and their topologies remain largely unchanged from one version to the other or from one technology to another. Therefore, the physical floorplan and the layout topology are hardly changed once the optimal layout is obtained. Laker's front to back-end ECO engines can capture and preserve the original optimal layout topology and flash the layout discrepancies with the new resized SPICE netlist.

With its new features and methodology, Laker is now able to expand the application to the retargeting, migration, and reuse arena. Reusing analog IP becomes less time consuming. This new capability enables IP providers to generate foundry specific and silicon proven hard IPs quickly and painlessly.

About Laker
The Laker layout system is the next generation full custom layout solution. Its patented Magic Cell, Rule-Driven, and automation technology conservatively deliver 6X productivity gains over existing methodologies. Laker has long been a recognized reference standard for full custom layout solutions, with more than 200 companies worldwide using it to deliver more than 2000 successful chip tapeouts. Laker is a proven product for designs ranging from analog-mixed signal to multi-million gate SoC designs.

Pricing and Availability
Laker 3.1 with above mentioned features is available now. Laker is supported on the Sun Solaris, HP-UX, and Linux platforms including AMD Opteron machines. For more information and the price structure, please contact Email Contact.

About Silicon Canvas
Silicon Canvas is the technology leader for full custom layout solutions. The company develops the Laker suite of tools - a completely new technology founded on best practices in computer software engineering with a clear focus on nanometer design requirements for analog, mixed signal, large complex IC's, ASSP, SoC, and test key designs. Silicon Canvas' toolset provides more automation and high performance capabilities to any design project which requires a more effective full custom layout solution. Customer applications include processors, computing systems, networking, telecommunication, and graphics ICs.

NOTE: Silicon Canvas is a registered trademark and Laker, Magic Cell & Rule-Driven are trademarks of Silicon Canvas, Inc. All other trademarks and registered trademarks are the property of their respective owners.

For more information, please contact:
Silicon Canvas, Inc.
Hau-Yung Chen
Phone: +1 (408) 321-0888
FAX: +1 (408) 321-0880
E-mail: Email Contact
Website at http://www.sicanvas.com