CAMPBELL, Calif., June 14, 2018 /PRNewswire-PRWeb/ -- Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Arteris executives Ty Garibay, CTO and DAC IP Track Chair and Organizer and Kurt Shuler, vice president of marketing, will be speaking at the Design Automation Conference (DAC).

Ty Garibay will deliver a talk titled, "Has the Time for Embedded FPGA Come at Last," on Tuesday, June 26, from 1:00-3:30 PM in room 2008.

For more information, please click HERE.

Kurt Shuler will participate as a panelist in a session titled, "The Automotive Digital Twin – Virtual or Virtually Impossible" on Tuesday, June 26, from 3:30-4:25 PM in room 3020.

For more information, please click HERE.

To register for DAC, please click HERE.

About Arteris IP
Arteris IP provides network-on-chip (NoC) interconnect IP to accelerate system-on-chip (SoC) semiconductor assembly for a wide range of applications from automobiles to mobile phones, IoT, cameras, SSD controllers, and servers for customers such as Samsung, Huawei / HiSilicon, Mobileye (Intel), Altera (Intel), and Texas Instruments. Arteris IP products include the Ncore cache coherent and FlexNoC non-coherent interconnect IP, the CodaCache standalone last level cache, and optional Resilience Package (ISO 26262 functional safety) and PIANO automated timing closure capabilities. Customer results obtained by using the Arteris IP product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit http://www.arteris.com or find us on LinkedIn at https://www.linkedin.com/company/arteris.

Arteris, FlexNoC, Ncore, and PIANO are registered trademarks of Arteris, Inc. Arteris IP, Code Cache, and the Arteris IP logo are trademarks of Arteris, Inc. Arm and AMBA are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. All other product or service names are the property of their respective owners.

SOURCE Arteris IP