Nassda Moderates Crosstalk Panel at Fabless Semiconductor Association Technical Conference
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Nassda Moderates Crosstalk Panel at Fabless Semiconductor Association Technical Conference

SANTA CLARA, Calif., Sept. 30 /PRNewswire-FirstCall/ --

   Who:    Nassda Corp.  announced today that Tak Young,
           senior principal product specialist, will moderate a panel
           discussion at the Fabless Semiconductor Association (FSA) Design
           Modeling Workshop.

   What:   Is crosstalk effect killing the semiconductor industry?

           Crosstalk issues are becoming more important in this era of
           130nm, 90nm and 65nm designs. Many companies have experienced
           chip failure due to crosstalk delay and/or crosstalk noise
           issues. Crosstalk issues are difficult to address, because of
           design complexity and the large number of false failures due to
           the inaccuracy of crosstalk delay and noise models. In this
           panel, the experts will discuss practical approaches for
           addressing these crosstalk issues.

   Who:    The following are the panelists:

           Maad Al-Dabagh    Director, Design Integrity at LSI Logic
           Henry Jyu         R&D Manager at Nassda
           Tao Lin           Manager of Product Development at Magma Design
                             Automation
           Jim McCanny       Group Marketing Director for Timing and Signal
                             Integrity at Cadence Design Systems
           Bill Mullen       Group Director of R&D for Static Timing and
                             Signal Integrity Analysis at Synopsys
           Wolfgang Roethig  Senior Engineering Manager at NEC Electronics
           Vinay Srinivas    Director of R&D at Sequence Design

           Tak Young is a twenty-seven-year veteran of the EDA industry. He
           has been focusing on signal integrity issues over the last ten
           years at EPIC, Synopsys, Monterey Design and now at Nassda. He is
           a senior principal product specialist at Nassda, and was senior
           technologist at Monterey Design and VP of R&D at Synopsys and
           EPIC. He also held key management and technical position at
           Motorola, ZyMOS and Signetics (Philips). He has been active in
           the organization of the ISQED conference, having served as
           Technical Chair, Conference Chair, Program Chair, and currently
           as a member of the Steering/Advisory committee.

   When:   Monday, October 4, 2004, from 4:30 p.m. to 5:30 p.m.
           David's Restaurant
           5151 Stars and Stripes Drive
           Santa Clara, CA 95054
           408-986-1666

   For more information please go to
   
http://www.fsa.org/suppliers_expo/tech_conference/modeling_agenda.asp

  About Nassda

Nassda Corporation is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, mixed signal, memory, system-on-chip and high performance digital designs. Nassda's products enable first silicon success, and improve IC quality and yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company's website at http://www.nassda.com/.

CONTACT: Graham Bell of Nassda Corporation, +1-408-988-9988, or
Email Contact; or Gloria Nichols of Lee Public Relations, +1-650-363-0142,
or Email Contact, for Nassda Corp.

Web site: http://www.nassda.com/