Atheros Communications Adopts Synopsys' NanoSim for Advanced Wireless Chip Verification
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Atheros Communications Adopts Synopsys' NanoSim for Advanced Wireless Chip Verification

NanoSim Speeds Analog-RF Circuit Verification Throughput by 10X

MOUNTAIN VIEW, Calif., Sept. 20 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, today announced that Atheros Communications, Inc. (NASDAQ: ATHR), a leading provider of advanced wireless LAN chipsets, has adopted Synopsys' NanoSim(R) for RF front-end circuits verification of its AR5005G single-chip wireless solution. The chip is a multi-million-gate integrated circuit (IC) that supports the IEEE 802.11b and 802.11g protocols. Using NanoSim 2004.06, Atheros engineers now can perform RF front-end circuits verification of their complex mixed-signal devices to help ensure first silicon success.

"NanoSim has given us tremendous productivity and good accuracy with a 10X runtime improvement over SPICE-based simulators," said Rick Bahr, vice president of engineering at Atheros Communications. "With NanoSim, we were able to verify the entire synthesizer behavior of our AR5005G, the world's first single-chip IEEE 802.11g solution. We chose NanoSim as a verification tool because it could handle the size and complexity of our leading-edge, mixed-signal chip."

NanoSim is an advanced transistor-level fast SPICE simulation and analysis tool for analog, digital and mixed-signal design verification. With the 2004.06 release, NanoSim became the only fast SPICE simulator that directly uses foundry-certified HSPICE(R) models and model evaluation engine to provide accurate circuit simulation. It features high simulation throughput and capacity for multi-million transistor designs and simulation accuracy for the most advanced IC processes technologies in CMOS, BiCMOS, and SOI.

"To effectively and timely verify today's complex mixed-signal IC chips, designers need to simulate ever larger portions of the circuit at the transistor level at higher throughput levels," said Raul Camposano, senior vice president, CTO and general manager, Silicon Engineering Group at Synopsys. "The successful deployment of NanoSim at leading wireless companies like Atheros further demonstrates our commitment to continuously improve our market-leading simulator to address mixed-signal circuit simulation challenges."

About Synopsys

Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Synopsys, HSPICE and NanoSim are registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

CONTACT: Lynda De Vol of Synopsys, Inc., +1-650-584-1190, or
Email Contact, or Julie Crabill of Edelman, Inc., +1-650-429-2732, or
Email Contact

Web site: http://www.synopsys.com/