Santa Clara, Calif. -- Thursday, November 6, 2008 ¾ Technologist Jiayong "Kelvin" Le of Extreme DATM will present the latest developments in the electrical-level modeling of library cells that are used in the design of integrated circuits (ICs), at a 2008 International Conference on Computer-Aided Design Workshop.
Who: Kelvin Le, Senior Member of the Technical Staff, Extreme DA
What: Presentation to the " Electrical Level Cell Modeling for Timing, Noise, and Power Analysis (ECM)" Workshop. Organizers include Massoud Pedram, Univ. Southern California; Noel Menezes, Intel; Peter Feldmann, IBM; and Igor Keller, Cadence Design Systems.
When: The workshop will take place on Thursday, November 13 from 8:30 a.m. to 5:30 p.m.
Where : The workshop will be held in the Donner Ballroom, DoubleTree Hotel, San Jose, Calif. For more information go to http://www2.iccad.com/2008/ecm.html
Workshop Abstract
Electrical-level modeling of library cells, for delay, noise, and power calculation is an important developing area across the Electronic Design Automation (EDA) community. The evolution of cell modeling addresses the challenging demands for higher accuracy, handling of variability, and improved product performance for large-scale analysis applications at current and future process technology nodes. In particular, controlled-current source models have emerged as the industry wide standardized solution for delay computation under cross-talk and process variations. This workshop will cover such topics as (i) motivation for moving to current-source modeling technologies in delay calculation, (ii) comparative analysis of existing current-source models including their abilities to address complexities of the 45nm era and beyond, (iii) the impact of new modeling technologies on delay calculation in variation-aware static timing and noise analysis flows, (iv) challenges and trends in library characterization, and (v) algorithmic advances required in the driving analysis applications for effective model usage. This workshop targets methodology changes related to usage of these models and practical deployment issues in actual design flows.
About Extreme DA
Headquartered in Santa Clara, Calif. with R&D centers in the U.S. and India, venture-funded Extreme DA develops and licenses software products to improve the performance and yield of nanometer integrated circuits. The company's investors include Foundation Capital, IT-Farm Corporation, and Lanza techVentures. For more news and information on Extreme DA, visit www.extreme-da.com or write to info@extreme-da.com.
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Contact:
Jean Armstrong
jean@akipr.com
Tel: 503-672-4680
