Intellitech ships new multi-voltage JTAG multiplexer to compete with IEEE 1149.1 linking devices from Texas Instruments and National Semiconductor
DURHAM, N.H.—(BUSINESS WIRE)—September 22, 2008—
Intellitech Corporation,
www.intellitech.com,
the leader in lowering electronic product costs through IEEE
1149.1/JTAG, has announced that it has shipped a new multi-voltage eight
ring JTAG multiplexer called the Scan Ring Linker in a 16mm x 16mm VQ100
package to early adopters. The SRL lowers PCB costs and reduces
engineering design time by eliminating pull-up/pull-down resistors,
buffer ICs and voltage translators needed for designing and routing JTAG
rings in complex PCBs and Systems, especially those with mezzanine
cards. The SRL enables partitioning of the PCB 1149.1/JTAG
infrastructure on-the-fly into short faster rings or to access plug-in
daughter boards with JTAG components. The use of a single scan-chain
implemented with buffers would create additive delays that lengthen the
test clock period. This results in longer on-board programming times,
slower boundary-scan and JTAG emulation based test and slower on-chip
instrument access times. When the PCB JTAG chain is not routed at all,
bed-of-nails fixturing is needed, increasing production costs and
removing the ability to test, configure or debug components on the PCB
‘in-situ
’.
The SRL is critical to providing access not just for PCB boundary-scan
test, but also to access on-chip Array BIST, Logic BIST, BERT and other
at-speed on-chip instruments while the PCB is in its chassis. The local
JTAG ports are programmable from 1.5V to 3.3V and can be set to two
separate JTAG chain voltages, thus eliminating external voltage
translators required by 3.3V-only competing solutions. The SRL provides
four buffered TCK and TMS pairs per local JTAG port. The JTAG controlled
TCK and TMS copies reduce performance limiting loading capacitance while
preserving testability for scan-chain shorts and opens. The SRL includes
‘wide-capture
’
which enables higher JTAG test frequencies for PCBs with long JTAG
routing and
‘transparent test-logic-reset
’
which enables test-logic-reset commands to propagate to compliant ICs
without losing the SRL ring configuration as is the case with competing
devices. The IC compatibility modes enable third party tools such as
emulators and FPGA programming pods to access the scan rings.
“Access to components over IEEE 1149.1 in
complex PCBs is critical for in-situ silicon debug, processor emulation
test and future P1687 (IJTAG) tests. The SRL furthers our leadership
position in offering semiconductors that lower product costs and enable
customers to maximize the benefits of these standards”
said CJ Clark, CEO of Intellitech.
The device is available in a leaded or RoHS and commercial or industrial
temperature ranges. Pricing starts at $5.15 in 1K quantities. More
information is available at
http://www.intellitech.com/products/srl.asp
High Density Photo:
http://www.intellitech.com/img/jtaglinker.jpg
About Intellitech
http://www.intellitech.com/company/about.asp
Contact:
Intellitech Corporation
Kareen Lefoley, 603-868-7116x106
Email Contact