IBM SystemC Models Support Advanced Architectural Exploration and System-Level Debug Capabilities of Summit Design’s Panorama and Vista Tools
The PowerPC models support the advanced debugging capabilities of Summit’s Vista™ Integrated Design Environment (IDE) for SystemC, including data introspection and advanced multi-thread debugging. Vista’s transaction sequence viewer enables users to effectively monitor and debug system activity at the transaction level. The IBM models will also be integrated with Visual Elite™, Summit’s design, integration and verification platform, which enables designers to intuitively capture and validate their designs while also providing support for the management of design files and effective team collaboration. The PowerPC models will support Panorama’s advanced system-level performance and power analysis capabilities. This enables design teams to perform “what-if” analysis early in the design cycle to optimize their system-level design.
“At IBM, we are dedicated to supporting advanced technologies, such as ESL, to allow designers to make informed decisions early in the design process,” says Ron Martino, Director, Power Architecture Offerings, IBM Technology Collaboration Solutions. “Summit Design can help our mutual customers accelerate the time to market for PowerPC core-based designs with Panorama’s architectural analysis capabilities. The ability to quickly evaluate design trade-offs at the system-level with other IP models gives our PowerPC customers a huge advantage.”
“The IBM PowerPC models represent an important addition to our SystemC IP portfolio of IP vendor authored SystemC models,” said Emil Girczyc, president and CEO of Summit Design, Inc. “We are seeing high demand for the ‘plug and play’ SystemC models in our portfolio, so we are working closely with a number of premier IP providers, such as IBM, to provide our customers with the means to quickly and easily achieve better IP selection, integration and interoperability success. Now, PowerPC customers will be able to mix and match IBM models with Summit generic SystemC models, and IP models from other vendors in the IP Initiative, to simplify system-level design and verification.”
Availability
The PowerPC core, bus, and peripheral models are currently available with Vista. Support for Visual Elite and Panorama is scheduled for Q4, 2006.
About Summit
Summit Design's industry-leading ESL and HDL solutions enable SOC companies to deliver products that meet system-level performance and power targets with dramatically reduced schedule risk. Summit's products address engineering challenges met during the specification and implementation design phases of complex hardware/software systems. Panorama™ allows designers to perform real-time application emulation of both the hardware and software portions of an embedded SoC, before core and IP selections are finalized. Vista™ is an integrated development environment (IDE) for SystemC that combines both hardware and software concepts to speed design and debug of SystemC and TLM applications. Visual Elite™ is a state-of-the-art design, integration and verification platform which enables designers to intuitively capture and validate their designs using high-level design techniques and languages. Top electronics companies worldwide, including leaders in the wireless, automotive, and consumer electronics space, have achieved dramatic reductions in design cycle time through their use of Summit's products. Summit Design is headquartered in Los Altos, California, with offices throughout the US, Europe, Japan, Israel, and ROA. To learn more, please visit http://www.sd.com.
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