Lattice Semiconductor Delivers Flexible Connectivity for Industrial Vision Applications With New CrossLink Reference Design

New SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design helps machine vision and robotics applications leverage advanced application processors

HILLSBORO, Ore. — (BUSINESS WIRE) — July 16, 2019Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced the availability of the latest in a series of new reference designs featuring the Lattice CrossLink™ FPGA for video bridging applications. The SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design provides industrial device customers with a flexible, easy-to-implement solution for connecting advanced application processors (APs) with many of the image sensors currently used in today’s machine vision applications for industrial environments.

Many industrial machine vision applications use image sensors with SubLVDS interface, which is incompatible with the MIPI CSI-2 D-PHY interface used on today’s APs. However, many industrial device OEMs want to implement these APs in existing machine vision-capable products. The Lattice SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design lets customers quickly and easily create a bridging solution so an AP with a MIPI CSI-2 interface can connect with a SubLVDS image sensor.

“In industrial environments, customers are interested in upgrading legacy machine vision applications to take advantage of the processing capabilities and feature sets of new APs,” said Peiju Chiang, Product Marketing Manager, Lattice Semiconductor. “Rather than devote precious time and engineering resources on an extensive device redesign, the Lattice CrossLink SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design provides a simple workaround that addresses legacy interface compatibility issues to get redesigned products to market quickly and cost effectively.”

The Lattice SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design is free and is provided to demonstrate the use of Lattice’s popular CrossLink modular IPs, including the Pixel-to-Byte Converter, SubLVDS Image Sensor Receiver and a CSI-2/DSI D-PHY Transmitter. Lattice also provides a complete, easy to use GUI-based FPGA design and verification software environment, Diamond® design software, to simplify and accelerate device development.

Other key features include:

  • 4, 6, 8, or 10 lane SubLVDS input to 1, 2, or 4 lane MIPI CSI-2 output
  • Up to 1.2 Gbps bandwidth per input lane
  • Up to 1.5 Gbps bandwidth per output lane
  • Dynamic parameter setting via I2C
  • Optional support for image cropping

More information about the new CrossLink SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design is available here.

About Lattice Semiconductor

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world.

For more information about Lattice, please visit www.latticesemi.com. You can also follow us via LinkedIn, Twitter, Facebook, YouTube, WeChat, Weibo or Youku.

Lattice Semiconductor Corporation, Lattice Semiconductor (& design) and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. The use of the word “partner” does not imply a legal partnership between Lattice and any other entity.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.



Contact:

MEDIA CONTACTS:
Doug Hunter
Lattice Semiconductor
503-268-8512
Email Contact

INVESTOR CONTACT:
David Pasquale
Global IR Partners
914-337-8801
Email Contact

Featured Video
Latest Blog Posts
Vijay ChobisaSiemens EDA
by Vijay Chobisa
The Rise of Custom Acceleration
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Nomination Deadline for Phil Kaufman Award and Hall of Fame: June 30
Jobs
Hardware Engineer for PTEC Solutions at Fremont, California
Senior Hardware Engineer IV – CA for Ampex Data Systems Corporation at Hayward, California
Senior Post Silicon Hardware Engineer for Nvidia at Santa Clara, California
Senior DPU System Application Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
Design Automation Conference (DAC) 2024 at Moscone West, San Francisco CA - Jun 23 - 27, 2024
SemiconWest - 2024 at Moscone Center San Francisco CA - Jul 9 - 11, 2024
Flash Memory 2024 Conference & Expo FMS2024 at Santa Clara Convention Center Santa Clara CA - Aug 6 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise