Moortec to exhibit at the 2018 TSMC North America OIP Ecosystem Forum in Santa Clara

October 03, 2018 - Moortec will be exhibiting it's In-Chip Monitoring Subsystem IP at the 2018 TSMC North America OIP Ecosystem Forum which is taking place this Wednesday, 3rd October at the Santa Clara Convention Centre.

Come and meet the Moortec team at booth  #408  and discuss in person how your advanced node System on Chip (SoC) program can benefit from Moortec's high performance In-Chip Monitoring Subsystem Solutions in terms of thermal management, detection of supply anomalies and the identification of process corners

Within the subsystem the Process Monitor provides the means for advanced node Integrated Circuit (IC) developers to detect the process variation of core digital MOS devices. The Process Monitor can also be used to enable continuous Dynamic Frequency and Voltage Scaling (DVFS) optimisation systems, monitor manufacturing variability across chip, gate delay measurements, critical path analysis, critical voltage analysis and also monitor silicon ‘ageing’.
 
The subsystem also includes a Voltage Monitor which is a low power self-contained IP block specially designed to monitor voltage levels within the core logic voltage domains and provide accurate IR drop analysis. The measurement range is customized to suit each technology. The monitor IP can also monitor analogue (IO) supply domains and is also well-suited to monitoring supply droops and perturbations.
 
To complete the system there is a high precision low power junction Temperature Sensor which has been developed to be embedded into ASIC designs. It can be used for a number of different applications including DVFS, device lifetime enhancement, device characterisation and thermal profiling. 
 
The package also includes a sophisticated PVT Controller with AMBA APB interfacing, which supports multiple monitor instances, statistics gathering, a production test access port as well as other compelling features.
 
Along with our offering we can provide expertise on macro placement, production results, support and guidance on how to implement DVFS/AVS optimisation schemes and reliability schemes. As a big growth area for advanced technology design, Moortec are able to help our customers understand more about architecting and implementing such schemes. Being the only PVT dedicated IP vendor, Moortec is now considered a centre-point for such expertise.
 
Moortec PVT monitoring IP is designed to optimise performance in today’s cutting edge technologies, solving the problems that come about through scaling of devices towards 28nm, 16nm, 12nm & 7nm. Applications include Datacentre & Enterprise, Automotive, Mobile, IoT, Consumer (DTV) and Telecommunications.
 
If you are working on advanced node technologies it is highly likely that your SoC will require monitoring to enhance real-time performance optimisation and lifetime reliability. Understanding how the chip has been made (process) as well as understanding its dynamic conditions (voltage supply and junction temperature) has become a critical requirement for advanced node semiconductor design.
 
About Moortec 

Established in 2005,  Moortec provide in-chip monitors and sensors, such as embedded Process Monitors (P), Voltage Monitors (V) and Temperature Sensors (T). Moortec’s PVT monitoring IP products enhance the performance and reliability of today’s Integrated Circuit (silicon chip) designs. Having a track record of delivery to tier-1 semiconductor and product companies, Moortec provide a quick and efficient path to market for customer products and innovations.
 
If you would like to arrange a meeting at the event please contact Ramsay Allen on +44 1752 875133 or email:  Email Contact
 
For more information please visit  www.moortec.com 



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+44 1752 875130

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