ClioSoft® Creates the Secret Sauce to Make Design Reuse a Reality

designHUB, a customizable ecosystem hosted within the company, enables easy sharing and reuse of design data including IPs, while mitigating the risk of unauthorized usage.

FREMONT, Calif. — (BUSINESS WIRE) — May 2, 2017ClioSoft today unveiled designHUBTM, a next generation ecosystem created primarily for design reuse to enable enterprises utilize existing design resources efficiently within the company. As leader in system-on-chip (SoC) design data and intellectual property (IP) management solutions for the semiconductor design industry, ClioSoft developed the designHUB platform on the concept that untapped ideas, design expertise or any intellectual property can be shared seamlessly across the company and leveraged to produce remarkable results.

Using designHUB, designers can search and compare IPs across geographical or business silos of a company, track their usage and review their quality before selecting the design module that best meets their design requirements. It provides a platform for designers to communicate with IP/SoC developers for any queries related to the IP, enabling quick resolution of any issues. In addition to sharing IPs, designHUB also empowers users to seamlessly share and track documents, flows, scripts, libraries, etc. across the enterprise. To enable designers to be more productive, designHUB tracks and collates all activities for design projects an engineer may be working on or has been involved in and displays the notifications and tasks assigned in a dashboard for easy review.

“There is a paradigm shift occurring within the IP ecosystem regarding IP usage, development and data sharing,” said Srinath Anantharaman, founder and CEO of ClioSoft. “Current products in the market today address IP reuse by web-based cataloging. By using the concept of crowdsourcing, designHUB bridges the gap between the IP developer and the IP user all within a single platform and extends the definition of IP to include SoC sub-systems, documents, ideas, scripts, flows etc. Design related information from various sources is seamlessly integrated into designHUB along with a rich set of reports to provide the relevant information to the designer and management community. Design reuse can now be a reality within a company.”

The designHUB platform is easily customizable and is hosted within the secure confines of the company.

Availability of designHUB

The designHUB platform is now available, and is currently being deployed at customer sites. ClioSoft will be demonstrating the designHUB platform at the upcoming Design Automation Conference booth # 613 at the Austin Convention Center, June 18 – 22, 2017. To set up a private demo of designHUB, visit www.cliosoft.com.

About ClioSoft

ClioSoft is the pioneer and leading developer of system-on-chip (SoC) design configuration and enterprise IP management solutions for the semiconductor industry. The company’s flagship product  SOS7 Design Collaboration Platform, built exclusively to meet the demanding requirements of SoC designs, empowers multi-site design teams to collaborate efficiently on complex analog, digital, RF and mixed-signal designs.

The collaborative IP management system from ClioSoft is part of the overall SOS Design Collaboration Platform. The IP management system improves design reuse by providing an easy-to-use workflow for designers to manage the process of shopping, consuming and producing new IPs. ClioSoft customers include the top 20 semiconductor companies worldwide. ClioSoft is headquartered at 39500 Stevenson Place, Suite 110, Fremont, CA, 94539. For more information visit us at  www.cliosoft.com.

All trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.



Contact:

Cayenne Communication
Michelle Clancy, 415-682-4552
Email Contact

Featured Video
Latest Blog Posts
Vijay ChobisaSiemens EDA
by Vijay Chobisa
The Rise of Custom Acceleration
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Nomination Deadline for Phil Kaufman Award and Hall of Fame: June 30
Jobs
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Post Silicon Hardware Engineer for Nvidia at Santa Clara, California
Hardware Engineer for PTEC Solutions at Fremont, California
Senior DPU System Application Engineer for Nvidia at Santa Clara, California
Upcoming Events
Design Automation Conference (DAC) 2024 at Moscone West, San Francisco CA - Jun 23 - 27, 2024
SemiconWest - 2024 at Moscone Center San Francisco CA - Jul 9 - 11, 2024
Flash Memory 2024 Conference & Expo FMS2024 at Santa Clara Convention Center Santa Clara CA - Aug 6 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise