Spreadtrum Accelerates Design Productivity Using Cadence Innovus Implementation System

SAN JOSE, Calif., March 10, 2015 — (PRNewswire) —  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Spreadtrum Communications (Shanghai) Co., Ltd. utilized the new Cadence® Innovus™ Implementation System to dramatically reduce the turnaround time of a multi-million-cell 28-nanometer (nm) intellectual property (IP) block while delivering to its power, performance, and area (PPA) goals. Spreadtrum's TAT for this IP block was reduced significantly while meeting the original PPA targets compared to its previous solution.

Cadence Logo.

Spreadtrum's turnaround time improvement and capacity gains resulted from rapid convergence on a high-quality placement optimization along with full-flow multi-threading enhancements in the Innovus Implementation System's new GigaPlace placement engine. Multi-threading, which is pervasive throughout the Innovus Implementation System, enables optimal throughput on 8- and 16-CPU machines, which are common in today's design server farms.

"The Innovus Implementation System significantly improved the runtime on a critical multi-million-cell IP core compared to our previous solution," said Robin Lu, vice president of ASIC at Spreadtrum Communications. "With runtimes improved to deliver more than a million cells per day of implementation throughput, we can confidently drive our aggressive schedules in the increasingly competitive mobile device market while delivering excellent quality of results."        

"Spreadtrum's designs are at the leading edge of complexity for mobile applications, where market windows are very short and hitting aggressive PPA targets with quick turnaround time is crucial," said Dr. Anirudh Devgan, senior vice president of the Digital and Signoff Group at Cadence. "The Innovus Implementation System speeds these complex implementations by providing an excellent starting placement and then leveraging its massively multi-threaded optimization engines to close PPA targets with best-in-class turnaround times."

The Innovus Implementation System is a next-generation physical implementation solution that enables system-on-chip (SoC) developers to deliver high-quality designs with best-in-class PPA while accelerating time to market. For more information on the Innovus Implementation System, please visit http://www.cadence.com/news/innovus. Also, see today's related press release titled, "Cadence Introduces Innovus Implementation System, Delivering Best-in-Class Results with Up to 10X Reduction in Turnaround Time," at http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=031015_Innovus.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at http://www.cadence.com/.

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks and Innovus is a trademark of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

For more information, please contact:
Cadence Newsroom
408-944-7039
Email Contact

Logo - http://photos.prnewswire.com/prnh/20140102/SF39436LOGO

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/spreadtrum-accelerates-design-productivity-using-cadence-innovus-implementation-system-300047132.html

SOURCE Cadence Design Systems, Inc.

Contact:
Cadence Design Systems, Inc.
Web: http://www.cadence.com

Featured Video
Jobs
Senior DPU System Application Engineer for Nvidia at Santa Clara, California
Senior Post Silicon Hardware Engineer for Nvidia at Santa Clara, California
Hardware Engineer for PTEC Solutions at Fremont, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
SemiconWest - 2024 at Moscone Center San Francisco CA - Jul 9 - 11, 2024
Flash Memory 2024 Conference & Expo FMS2024 at Santa Clara Convention Center Santa Clara CA - Aug 6 - 8, 2024
SEMICON Taiwan 2024 at Taipei Nangang Exhibition Center Taipei Taiwan - Sep 4 - 6, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise