Yamaha Reduces Leakage Power by 50 Percent in Mobile Chip Using Cadence Low-Power Solution

SAN JOSE, Calif., March 18, 2014 — (PRNewswire) —  Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Yamaha Corporation

(Yamaha) utilized components of the Cadence® Low-Power Solution to achieve a 50 percent reduction in leakage power in its newest chip for smartphones .  The Cadence tools used by Yamaha consisted of Cadence Encounter® RTL Compiler (RC), Cadence Encounter Conformal® Low Power (CLP) and Cadence Encounter Digital Implementation (EDI) System.
Cadence Logo.

"Low power is critical for our new mobile chip designs," said Shuhei Ito, development director, Yamaha Corporation. "Because the tools in the Cadence Low-Power Solution support the Common Power Format, it allowed us to leverage advanced power management techniques, which resulted in better power and performance and shorter turnaround time for our design."

The Cadence Low-Power Solution supports many advanced low-power techniques such as multi-supply voltage, power shutoff and multi-bit cell inferencing, which are critical to reducing power. In addition to reducing leakage power, Yamaha utilized the solution to achieve design closure at the target performance and power levels. The design tools in the solution support a consistent power management intent as described in the Common Power Format (CPF) for all design phases such as implementation and verification from register-transfer level (RTL) to GDSII.

For more information on the Cadence Low-Power Solution, visit www.cadence.com/news/lpsolution.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available here.

© 2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, Conformal, and Encounter are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries.  All other trademarks are the property of their respective owners.

For more information, please contact:
Cadence Newsroom
408-944-7039
Email Contact

Logo - http://photos.prnewswire.com/prnh/20140102/SF39436LOGO

SOURCE Cadence Design Systems, Inc.

Contact:
Cadence Design Systems, Inc.
Web: http://www.cadence.com

Featured Video
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
ESD Alliance Member Companies at DAC
Jobs
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Post Silicon Hardware Engineer for Nvidia at Santa Clara, California
Senior Hardware Engineer IV – CA for Ampex Data Systems Corporation at Hayward, California
Senior DPU System Application Engineer for Nvidia at Santa Clara, California
Upcoming Events
SemiconWest - 2024 at Moscone Center San Francisco CA - Jul 9 - 11, 2024
Flash Memory 2024 Conference & Expo FMS2024 at Santa Clara Convention Center Santa Clara CA - Aug 6 - 8, 2024
SEMICON Taiwan 2024 at Taipei Nangang Exhibition Center Taipei Taiwan - Sep 4 - 6, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise